AT89LS53-12JI Atmel, AT89LS53-12JI Datasheet - Page 20

IC 8051 MCU FLASH 12K 44PLCC

AT89LS53-12JI

Manufacturer Part Number
AT89LS53-12JI
Description
IC 8051 MCU FLASH 12K 44PLCC
Manufacturer
Atmel
Series
89LSr
Datasheet

Specifications of AT89LS53-12JI

Core Processor
8051
Core Size
8-Bit
Speed
12MHz
Connectivity
SPI, UART/USART
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
AT89LS5312JI

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Serial Programming Algorithm
To program and verify the AT89LS53 in the serial program-
ming mode, the following sequence is recommended:
1. Power-up sequence:
2. Enable serial programming by sending the Pro-
3. The Code array is programmed one byte at a time
Instruction Set
Notes:
20
Instruction
Programming Enable
Chip Erase
Read Code Memory
Write Code Memory
Write Lock Bits
Apply power between V
Set RST pin to “H”.
If a crystal is not connected across pins XTAL1 and
XTAL2, apply a 3 MHz to 12 MHz clock to XTAL1 pin
and wait for at least 10 milliseconds.
gramming Enable serial instruction to pin MOSI/
P1.5. The frequency of the shift clock supplied at
pin SCK/P1.7 needs to be less than the CPU clock
at XTAL1 divided by 40.
by supplying the address and data together with the
appropriate Write instruction. The selected memory
location is first automatically erased before new
data is written. The write cycle is self-timed and typ-
ically takes less than 2.5 ms at 5V and less than 10
ms at 2.7V.
1. DATA polling is used to indicate the end of a write cycle which typically takes less than 10 ms at 2.7V.
2. “x” = don’t care.
AT89LS53
1010 1100
1010 1100
1010 1100
Byte 1
CC
and GND pins.
01
10
Input Format
0101 0011
xxxx x100
low addr
low addr
Byte 2
x x111
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
data in
Byte 3
4. Any memory location can be verified by using the
5. At the end of a programming session, RST can be
Power-off sequence (if needed):
Serial Programming Instruction
The Instruction Set for Serial Programming follows a 3-byte
protocol and is shown in the following table:
Operation
Enable serial programming interface after RST goes
high.
Chip erase the 12K memory array.
Read data from Code memory array at the selected
address. The 6 MSBs of the first byte are the high order
address bits. The low order address bits are in the
second byte. Data are available at pin MISO during the
third byte.
Write data to Code memory location at selected
address. The address bits are the 6 MSBs of the first
byte together with the second byte.
Write lock bits.
Set LB1, LB2 or LB3 = “0” to program lock bits.
Set XTAL1 to “L” (if a crystal is not used).
Set RST to “L”.
Turn V
Read instruction which returns the content at the
selected address at serial output MISO/P1.6.
set low to commence normal operation.
CC
power off.
0851C–MICRO–3/06

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