ATTINY11L-2PI Atmel, ATTINY11L-2PI Datasheet - Page 26

IC AVR MCU 1K 2MHZ LV IND 8-DIP

ATTINY11L-2PI

Manufacturer Part Number
ATTINY11L-2PI
Description
IC AVR MCU 1K 2MHZ LV IND 8-DIP
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY11L-2PI

Core Processor
AVR
Core Size
8-Bit
Speed
2MHz
Peripherals
WDT
Number Of I /o
6
Program Memory Size
1KB (512 x 16)
Program Memory Type
FLASH
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Ram Size
-
Data Converters
-
Connectivity
-
Other names
ATTINY11L2PI

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY11L-2PI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Power-on Reset for the
ATtiny12
26
ATtiny11/12
A Power-on Reset (POR) pulse is generated by an on-chip detection circuit. The detec-
tion level is nominally 1.4V. The POR is activated whenever V
level. The POR circuit can be used to trigger the start-up reset, as well as detect a fail-
ure in supply voltage.
The Power-on Reset (POR) circuit ensures that the device is reset from power-on.
Reaching the Power-on Reset threshold voltage invokes a delay counter, which deter-
mines the delay for which the device is kept in Reset after V
of the delay counter can be defined by the user through the CKSEL fuses. The different
selections for the delay period are presented in Table 10. The Reset signal is activated
again, without any delay, when the V
If the built-in start-up delay is sufficient, RESET can be connected to V
an external pull-up resistor. See Figure 17. By holding the RESET pin low for a period
after V
ure 18 for a timing example on this.
Figure 17. MCU Start-up, RESET Tied to V
Figure 18. MCU Start-up, RESET Extended Externally
INTERNAL
TIME-OUT
INTERNAL
TIME-OUT
RESET
RESET
RESET
RESET
V
V
CC
CC
CC
has been applied, the Power-on Reset period can be extended. Refer to Fig-
V
V
V
POT
RST
POT
t
TOUT
CC
decreases below detection level.
V
RST
CC
.
t
TOUT
CC
CC
rise. The time-out period
is below the detection
CC
directly or via
1006F–AVR–06/07

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