ATMEGA128-16AI Atmel, ATMEGA128-16AI Datasheet - Page 53
ATMEGA128-16AI
Manufacturer Part Number
ATMEGA128-16AI
Description
IC AVR MCU 128K 16MHZ 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA128-16AI
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
Q1167170A
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA128-16AI
Manufacturer:
FSC
Quantity:
7 600
Part Number:
ATMEGA128-16AI
Manufacturer:
ATMEL/爱特梅尔
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Watchdog Reset
MCU Control and
Status Register –
MCUCSR
Internal Voltage
Reference
2467V–AVR–02/11
When the Watchdog times out, it will generate a short reset pulse of 1 CK cycle duration. On the
falling edge of this pulse, the delay timer starts counting the Time-out period t
54
Figure 27. Watchdog Reset During Operation
The MCU Control and Status Register provides information on which reset source caused an
MCU reset.
Note that only EXTRF and PORF are available in Atmel
• Bit 4 – JTRF: JTAG Reset Flag
This bit is set if a reset is being caused by a logic one in the JTAG Reset Register selected by
the JTAG instruction AVR_RESET. This bit is reset by a Power-on Reset, or by writing a logic
zero to the flag.
• Bit 3 – WDRF: Watchdog Reset Flag
This bit is set if a Watchdog Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
• Bit 2 – BORF: Brown-out Reset Flag
This bit is set if a Brown-out Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
• Bit 1 – EXTRF: External Reset Flag
This bit is set if an External Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
• Bit 0 – PORF: Power-On Reset Flag
This bit is set if a Power-on Reset occurs. The bit is reset only by writing a logic zero to the flag.
To make use of the reset flags to identify a reset condition, the user should read and then reset
the MCUCSR as early as possible in the program. If the register is cleared before another reset
occurs, the source of the reset can be found by examining the reset flags.
ATmega128 features an internal bandgap reference. This reference is used for Brown-out
Detection, and it can be used as an input to the Analog Comparator or the ADC. The 2.56V ref-
erence to the ADC is generated from the internal bandgap reference.
Bit
Read/Write
Initial Value
for details on operation of the Watchdog Timer.
CC
R/W
JTD
7
0
R
6
–
0
R
5
–
0
CK
JTRF
R/W
4
WDRF
R/W
3
See Bit Description
BORF
®
R/W
AVR
2
®
ATmega103 compatibility mode.
EXTRF
R/W
1
PORF
R/W
ATmega128
0
TOUT
MCUCSR
. Refer to
page
53
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