ATMEGA8L-8PI Atmel, ATMEGA8L-8PI Datasheet - Page 172
![IC AVR MCU 8K LV 8MHZ IND 28-DIP](/photos/7/21/72189/453-28-dip_sml.jpg)
ATMEGA8L-8PI
Manufacturer Part Number
ATMEGA8L-8PI
Description
IC AVR MCU 8K LV 8MHZ IND 28-DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8L-8PI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA8L8PI
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172
ATmega8(L)
Figure 78. Data Transfer in Master Transmitter Mode
A START condition is sent by writing the following value to TWCR:
TWEN must be set to enable the Two-wire Serial Interface, TWSTA must be written to one to
transmit a START condition and TWINT must be written to one to clear the TWINT Flag. The
TWI will then test the Two-wire Serial Bus and generate a START condition as soon as the bus
becomes free. After a START condition has been transmitted, the TWINT Flag is set by hard-
ware, and the status code in TWSR will be 0x08 (see
MT mode, SLA+W must be transmitted. This is done by writing SLA+W to TWDR. Thereafter the
TWINT bit should be cleared (by writing it to one) to continue the transfer. This is accomplished
by writing the following value to TWCR:
When SLA+W have been transmitted and an acknowledgement bit has been received, TWINT is
set again and a number of status codes in TWSR are possible. Possible status codes in Master
mode are 0x18, 0x20, or 0x38. The appropriate action to be taken for each of these status codes
is detailed in
When SLA+W has been successfully transmitted, a data packet should be transmitted. This is
done by writing the data byte to TWDR. TWDR must only be written when TWINT is high. If not,
the access will be discarded, and the Write Collision bit (TWWC) will be set in the TWCR Regis-
ter. After updating TWDR, the TWINT bit should be cleared (by writing it to one) to continue the
transfer. This is accomplished by writing the following value to TWCR:
This scheme is repeated until the last byte has been sent and the transfer is ended by generat-
ing a STOP condition or a repeated START condition. A STOP condition is generated by writing
the following value to TWCR:
A REPEATED START condition is generated by writing the following value to TWCR:
After a repeated START condition (state 0x10) the Two-wire Serial Interface can access the
same Slave again, or a new Slave without transmitting a STOP condition. Repeated START
TWCR
value
TWCR
value
TWCR
value
TWCR
value
TWCR
value
SDA
SCL
TWINT
TWINT
TWINT
TWINT
TWINT
Table 66 on page
1
1
1
1
1
TRANSMITTER
Device 1
MASTER
TWEA
TWEA
TWEA
TWEA
TWEA
X
X
X
X
X
173.
Device 2
TWSTA
TWSTA
TWSTA
TWSTA
TWSTA
RECEIVER
SLAVE
1
0
0
0
1
TWSTO
TWSTO
TWSTO
TWSTO
TWSTO
Device 3
0
0
0
1
0
TWWC
TWWC
TWWC
TWWC
TWWC
........
X
X
X
X
X
Table 66 on page
Device n
TWEN
TWEN
TWEN
TWEN
TWEN
V
1
1
1
1
1
CC
R1
–
0
–
0
–
0
–
0
–
0
173). In order to enter
R2
TWIE
TWIE
TWIE
TWIE
TWIE
2486Z–AVR–02/11
X
X
X
X
X
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