PIC16C925/CL Microchip Technology, PIC16C925/CL Datasheet - Page 56

• Manufacturer Part Number: PIC16C925/CL
• Description: IC MCU EPROM 4KX14 LCDDVR 68CLCC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C925/CL

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: EPROM
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-CLCC Window, 68-CERQUAD
• For Use With: AC164308 - MODULE SKT FOR PM3 68PLCCDVA16XL680 - ADAPTER DEVICE FOR MPLAB-ICEAC164024 - ADAPTER PICSTART PLUS 68PLCCAC164022 - MODULE SKT PROMATEII 68PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

PIC16C925/926
8.1
In Capture mode, CCPR1H:CCPR1L captures the
16-bit value of the TMR1 register when an event occurs
on pin RC2/CCP1 (Figure 8-1). An event can be
selected to be one of the following:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
An event is selected by control bits CCP1M3:CCP1M0
(CCP1CON<3:0>). When a capture is made, the inter-
rupt request flag bit CCP1IF (PIR1<2>) is set. It must
be cleared in software. If another capture occurs before
the value in register CCPR1 is read, the old captured
value is overwritten with the new captured value.
8.1.1
In Capture mode, the RC2/CCP1 pin should be config-
ured as an input by setting the TRISC<2> bit.
FIGURE 8-1:
8.1.2
Timer1 must be running in Timer mode, or Synchro-
nized Counter mode, for the CCP module to use the
capture feature. In Asynchronous Counter mode, the
capture operation may not work.
DS39544A-page 54
RC2/CCP1
pin
Note:
Capture Mode
If the RC2/CCP1 pin is configured as an
output, a write to the port can cause a cap-
ture condition.
edge detect
CCP PIN CONFIGURATION
TIMER1 MODE SELECTION
Q’s
Prescaler
1, 4, 16
CCP
and
CCP1CON<3:0>
Set CCP1IF
CAPTURE MODE
OPERATION BLOCK
DIAGRAM
PIR1<2>
Capture
Enable
CCPR1H
TMR1H
CCPR1L
TMR1L
Preliminary
8.1.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep
enable bit CCP1IE (PIE1<2>) clear to avoid false inter-
rupts and should clear flag bit CCP1IF following any
such change in operating mode.
8.1.4
There are four prescaler settings, specified by bits
CCP1M3:CCP1M0. Whenever the CCP module is
turned off, or the CCP module is not in Capture mode,
the prescaler counter is cleared. This means that any
RESET will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared, therefore, the first capture may be from
a non-zero prescaler. Example 8-1 shows the recom-
mended method for switching between capture pres-
calers. This example also clears the prescaler counter
and will not generate the “false” interrupt.
EXAMPLE 8-1:
CLRF
MOVLW
MOVWF
CCP1CON
NEW_CAPT_PS ; Load the W reg with
CCP1CON
SOFTWARE INTERRUPT
CCP PRESCALER
CHANGING BETWEEN
CAPTURE PRESCALERS
; Turn CCP module off
; the new prescaler
; mode value and CCP ON
; Load CCP1CON with
; this value
2001 Microchip Technology Inc.