PIC18C658-E/PT Microchip Technology, PIC18C658-E/PT Datasheet - Page 79

• Manufacturer Part Number: PIC18C658-E/PT
• Description: IC MCU OTP 16KX16 CAN 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C658-E/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC18C658E/PT

REGISTER 7-3:
 2000 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
INTCON3 REGISTER
bit 7
INT2IP: INT2 External Interrupt Priority bit
1 = High priority
0 = Low priority
INT1IP: INT1 External Interrupt Priority bit
1 = High priority
0 = Low priority
INT3IE: INT3 External Interrupt Enable bit
1 = Enables the INT3 external interrupt
0 = Disables the INT3 external interrupt
INT2IE: INT2 External Interrupt Enable bit
1 = Enables the INT2 external interrupt
0 = Disables the INT2 external interrupt
INT1IE: INT1 External Interrupt Enable bit
1 = Enables the INT1 external interrupt
0 = Disables the INT1 external interrupt
INT3IF: INT3 External Interrupt Flag bit
1 = The INT3 external interrupt occurred
0 = The INT3 external interrupt did not occur
INT2IF: INT2 External Interrupt Flag bit
1 = The INT2 external interrupt occurred
0 = The INT2 external interrupt did not occur
INT1IF: INT1 External Interrupt Flag bit
1 = The INT1 external interrupt occurred
0 = The INT1 external interrupt did not occur
Legend:
R = Readable bit
- n = Value at POR
Note:
INT2IP
R/W-1
(must be cleared in software)
(must be cleared in software)
(must be cleared in software)
Interrupt flag bits get set when an interrupt condition occurs, regardless of the state
of its corresponding enable bit or the global enable bit. User software should ensure
the appropriate interrupt flag bits are clear prior to enabling an interrupt. This feature
allows software polling.
INT1IP
R/W-1
Advanced Information
INT3IE
R/W-0
W = Writable bit
’1’ = Bit is set
INT2IE
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
INT1IE
R/W-0
INT3IF
R/W-0
PIC18CXX8
x = Bit is unknown
INT2IF
R/W-0
DS30475A-page 79
INT1IF
R/W-0
bit 0