PIC16F871-E/L Microchip Technology, PIC16F871-E/L Datasheet - Page 65

• Manufacturer Part Number: PIC16F871-E/L
• Description: IC MCU CMOS 20MHZ 2K FLSH 44PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F871-E/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-PLCC
• For Use With: DVA16XL441 - ADAPTER DEVICE ICE 44PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.1
The BRG supports both the Asynchronous and Syn-
chronous modes of the USART. It is a dedicated 8-bit
baud rate generator. The SPBRG register controls the
period of a free running 8-bit timer. In Asynchronous
mode, bit BRGH (TXSTA<2>) also controls the baud
rate. In Synchronous mode, bit BRGH is ignored.
Table 9-1 shows the formula for computation of the
baud rate for different USART modes which only apply
in Master mode (internal clock).
Given the desired baud rate and F
integer value for the SPBRG register can be calculated
using the formula in Table 9-1. From this, the error in
baud rate can be determined.
TABLE 9-1:
TABLE 9-2:
 2003 Microchip Technology Inc.
98h
18h
99h
Legend:
Legend:
Address
SYNC
0
1
USART Baud Rate Generator
(BRG)
x = unknown, - = unimplemented, read as '0'. Shaded cells are not used by the BRG.
X = value in SPBRG (0 to 255)
TXSTA
RCSTA
SPBRG
Name
(Asynchronous) Baud Rate = F
BAUD RATE FORMULA
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
(Synchronous) Baud Rate = F
Baud Rate Generator Register
CSRC
SPEN
Bit 7
BRGH = 0 (Low Speed)
Bit 6
RX9
TX9
OSC
SREN
TXEN
Bit 5
, the nearest
OSC
OSC
CREN
SYNC
Bit 4
/(64(X+1))
/(4(X+1))
ADDEN
Bit 3
—
It may be advantageous to use the high baud rate
(BRGH = 1), even for slower baud clocks. This is
because the F
baud rate error in some cases.
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared). This ensures the
BRG does not wait for a timer overflow before
outputting the new baud rate.
9.1.1
The data on the RC7/RX/DT pin is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RX pin.
BRGH
FERR
Bit 2
SAMPLING
OERR
TRMT
Bit 1
OSC
Baud Rate = F
PIC16F870/871
BRGH = 1 (High Speed)
/(16(X + 1)) equation can reduce the
RX9D
TX9D
Bit 0
N/A
OSC
0000 -010
0000 000x
0000 0000
POR, BOR
Value on:
/(16(X+1))
DS30569B-page 63
0000 -010
0000 000x
0000 0000
Value on
RESETS
all other