PIC18LF2439T-I/SO Microchip Technology, PIC18LF2439T-I/SO Datasheet - Page 237
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PIC18LF2439T-I/SO
Manufacturer Part Number
PIC18LF2439T-I/SO
Description
IC MCU FLASH 6KX16 EE A/D 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Specifications of PIC18LF2439T-I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (6K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
640 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
640 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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LFSR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
2002 Microchip Technology Inc.
Q Cycle Activity:
After Instruction
Decode
Decode
FSR2H
FSR2L
Q1
Read literal
Read literal
Load FSR
[ label ]
0 ≤ f ≤ 2
0 ≤ k ≤ 4095
k → FSRf
None
The 12-bit literal 'k' is loaded into
the file select register pointed to
by 'f'.
2
2
LFSR 2, 0x3AB
'k' MSB
'k' LSB
1110
1111
Q2
=
=
0x03
0xAB
LFSR f,k
1110
0000
Process
Process
Data
Data
Q3
k
00ff
7
kkk
Write literal
'k' to FSRfL
literal 'k'
MSB to
FSRfH
Write
Q4
k
kkkk
11
kkk
Preliminary
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
W
REG
W
Q1
register 'f'
Move f
[ label ]
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
f → dest
N, Z
The contents of register 'f' are
moved to a destination dependent
upon the status of ‘d’. If 'd' is 0, the
result is placed in W. If 'd' is 1, the
result is placed back in register 'f'
(default). Location 'f' can be any-
where in the 256 byte bank. If ‘a’ is
0, the Access Bank will be
selected, overriding the BSR value.
If ‘a’ = 1, then the bank will be
selected as per the BSR value
(default).
1
1
MOVF
Read
0101
Q2
PIC18FXX39
=
=
=
=
0x22
0xFF
0x22
0x22
REG, 0, 0
MOVF
00da
Process
Data
Q3
DS30485A-page 235
f [,d [,a]
ffff
Write W
Q4
ffff
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