PIC18LF8525T-I/PT Microchip Technology, PIC18LF8525T-I/PT Datasheet - Page 222
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PIC18LF8525T-I/PT
Manufacturer Part Number
PIC18LF8525T-I/PT
Description
IC PIC MCU FLASH 24KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet
1.PIC18F6525-IPT.pdf
(396 pages)
Specifications of PIC18LF8525T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3840 B
Interface Type
MSSP, SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
69
Number Of Timers
2 x 8 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163032
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF8525T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18F6525/6621/8525/8621
19.1.2
The Enhanced USART module supports the automatic
detection and calibration of baud rate. This feature is
active only in Asynchronous mode and while the WUE
bit is clear.
The automatic baud rate measurement sequence
(Figure 19-1) begins whenever a Start bit is received
and the ABDEN bit is set. The calculation is
self-averaging.
In the Auto-Baud Rate Detect (ABD) mode, the clock to
the BRG is reversed. Rather than the BRG clocking the
incoming RXx signal, the RXx signal is timing the BRG.
In ABD mode, the internal Baud Rate Generator is
used as a counter to time the bit period of the incoming
serial byte stream.
Once the ABDEN bit is set, the state machine will clear
the BRG and look for a Start bit. The Auto-Baud Rate
Detect must receive a byte with the value 55h
(ASCII “U”, which is also the LIN bus Sync character),
in order to calculate the proper bit rate. The measure-
ment is taken over both a low and a high bit time in
order to minimize any effects caused by asymmetry of
the incoming signal. After a Start bit, the SPBRGx
begins counting up using the preselected clock source
on the first rising edge of RXx. After eight bits on the
RXx pin or the fifth rising edge, an accumulated value
totalling the proper BRG period is left in the
SPBRGHx:SPBRGx register pair. Once the 5th edge is
seen (this should correspond to the Stop bit), the
ABDEN bit is automatically cleared.
While calibrating the baud rate period, the BRG regis-
ters are clocked at 1/8th the preconfigured clock rate.
Note that the BRG clock will be configured by the
BRG16 and BRGH bits. Independent of the BRG16 bit
setting, both the SPBRGx and SPBRGHx will be used
FIGURE 19-1:
DS39612B-page 220
BRG Value
BRG Clock
ABDEN bit
SPBRGHx
Note: The ABD sequence requires the EUSART module to be configured in Asynchronous mode and WUE = 0.
(Interrupt)
RCxIF bit
RCREGx
SPBRGx
RXx pin
Read
AUTO-BAUD RATE DETECT
Set by User
XXXXh
AUTOMATIC BAUD RATE CALCULATION
0000h
Start
Bit 0
XXXXh
XXXXh
Edge #1
Bit 1
Bit 2
Edge #2
as a 16-bit counter. This allows the user to verify that
no carry occurred for 8-bit modes by checking for 00h
in the SPBRGHx register. Refer to Table 19-4 for
counter clock rates to the BRG.
While the ABD sequence takes place, the EUSART
state machine is held in Idle. The RCxIF interrupt is set
once the fifth rising edge on RXx is detected. The value
in the RCREGx needs to be read to clear the RC1IF
interrupt. RCREGx content should be discarded.
TABLE 19-4:
BRG16
Note:
Note 1: If the WUE bit is set with the ABDEN bit,
Bit 3
0
0
1
1
2: It is up to the user to determine that the
Bit 4
Edge #3
BRGH
During the ABD sequence, SPBRGx and
SPBRGHx are both used as a 16-bit
counter, independent of BRG16 setting.
Auto-Baud Rate Detection will occur on
the byte following the Break character.
incoming character baud rate is within the
range of the selected BRG clock source.
Some
frequency and EUSART baud rates are
not possible due to bit error rates. Overall
system timing and communication baud
rates must be taken into consideration
when
Detection feature.
0
1
0
1
Bit 5
BRG COUNTER CLOCK
RATES
using
combinations
Bit 6
Edge #4
2005 Microchip Technology Inc.
BRG Counter Clock
the
Bit 7
F
F
F
F
OSC
OSC
OSC
OSC
Auto-Baud
Stop Bit
Edge #5
/512
/128
/128
/32
Auto-Cleared
of
001Ch
1Ch
00h
oscillator
Rate
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