PIC18LF8525T-I/PT Microchip Technology, PIC18LF8525T-I/PT Datasheet - Page 390
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PIC18LF8525T-I/PT
Manufacturer Part Number
PIC18LF8525T-I/PT
Description
IC PIC MCU FLASH 24KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet
1.PIC18F6525-IPT.pdf
(396 pages)
Specifications of PIC18LF8525T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3840 B
Interface Type
MSSP, SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
69
Number Of Timers
2 x 8 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163032
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF8525T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18F6525/6621/8525/8621
RESET .............................................................................. 305
Reset........................................................................... 29, 259
RETFIE ............................................................................. 306
RETLW.............................................................................. 306
RETURN ........................................................................... 307
Return Address Stack ......................................................... 42
Revision History ................................................................ 377
RLCF................................................................................. 307
RLNCF .............................................................................. 308
RRCF ................................................................................ 308
RRNCF.............................................................................. 309
DS39612B-page 388
CONFIG7H (Configuration 7 High) ........................... 266
CONFIG7L (Configuration 7 Low)............................. 265
CVRCON (Comparator Voltage
Device ID Register 2 ................................................. 266
DEVID1 (Device ID Register 1)................................. 266
ECCPxAS (ECCP Auto-Shutdown Control) .............. 169
ECCPxDEL (PWM Configuration)............................. 168
EECON1 (Data EEPROM Control 1) .................... 63, 80
INTCON (Interrupt Control) ......................................... 89
INTCON2 (Interrupt Control 2) .................................... 90
INTCON3 (Interrupt Control 3) .................................... 91
IPR1 (Peripheral Interrupt Priority 1)........................... 98
IPR2 (Peripheral Interrupt Priority 2)........................... 99
IPR3 (Peripheral Interrupt Priority 3)......................... 100
LVDCON (Low-Voltage Detect Control).................... 255
MEMCON (Memory Control)....................................... 71
OSCCON (Oscillator Control) ..................................... 25
PIE1 (Peripheral Interrupt Enable 1) ........................... 95
PIE2 (Peripheral Interrupt Enable 2) ........................... 96
PIE3 (Peripheral Interrupt Enable 3) ........................... 97
PIR1 (Peripheral Interrupt
PIR2 (Peripheral Interrupt
PIR3 (Peripheral Interrupt
PSPCON (Parallel Slave Port Control) ..................... 129
RCON (Reset Control) ........................................ 59, 101
RCSTAx (Receive Status and Control) ..................... 215
SSPCON1 (MSSP Control 1, I
SSPCON1 (MSSP Control 1, SPI Mode) .................. 175
SSPCON2 (MSSP Control 2, I
SSPSTAT (MSSP Status, I
SSPSTAT (MSSP Status, SPI Mode) ....................... 174
STATUS ...................................................................... 58
STKPTR (Stack Pointer) ............................................. 43
Summary............................................................... 51–54
T0CON (Timer0 Control)........................................... 131
T1CON (Timer 1 Control).......................................... 135
T2CON (Timer 2 Control).......................................... 141
T3CON (Timer3 Control)........................................... 143
T4CON (Timer 4 Control).......................................... 147
TXSTAx (Transmit Status and Control) .................... 214
WDTCON (Watchdog Timer Control)........................ 267
MCLR Reset (normal operation) ................................. 29
MCLR Reset (Sleep) ................................................... 29
Power-on Reset .......................................................... 29
Programmable Brown-out Reset (BOR) ..................... 29
RESET Instruction ...................................................... 29
Stack Full Reset .......................................................... 29
Stack Underflow Reset ............................................... 29
Watchdog Timer (WDT) Reset.................................... 29
and Associated Registers ........................................... 43
Reference Control)............................................ 249
Request (Flag) 1) ................................................ 92
Request (Flag) 2) ................................................ 93
Request (Flag) 3) ................................................ 94
2
C Mode)........................ 183
2
2
C Mode) .................. 184
C Mode) .................. 185
S
SCK .................................................................................. 173
SDI.................................................................................... 173
SDO .................................................................................. 173
Serial Clock, SCK ............................................................. 173
Serial Data In (SDI)........................................................... 173
Serial Data Out (SDO) ...................................................... 173
Serial Peripheral Interface. See SPI Mode.
SETF................................................................................. 309
Slave Select (SS).............................................................. 173
Slave Select Synchronization ........................................... 179
SLEEP .............................................................................. 310
Sleep......................................................................... 259, 269
Software Simulator (MPLAB SIM) .................................... 318
Software Simulator (MPLAB SIM30) ................................ 318
Special Event Trigger. See Compare (ECCP Mode).
Special Event Trigger. See Compare (ECCP Module).
Special Features of the CPU ............................................ 259
Special Function Registers ................................................. 47
SPI Mode
SS ..................................................................................... 173
SSPOV ............................................................................. 203
SSPOV Status Flag .......................................................... 203
SSPSTAT Register
Status Bits
SUBFWB .......................................................................... 310
SUBLW ............................................................................. 311
SUBWF............................................................................. 311
SUBWFB .......................................................................... 312
SWAPF ............................................................................. 312
T
T0CON Register
Table Pointer Operations (table)......................................... 64
TBLRD .............................................................................. 313
TBLWT.............................................................................. 314
Time-out in Various Situations............................................ 31
Configuration Registers .................................... 260–266
Map............................................................................. 49
Associated Registers ................................................ 181
Bus Mode Compatibility ............................................ 181
Effects of a Reset ..................................................... 181
Master Mode............................................................. 178
Master/Slave Connection.......................................... 177
Serial Clock............................................................... 173
Serial Data In ............................................................ 173
Serial Data Out ......................................................... 173
Slave Mode............................................................... 179
Slave Select.............................................................. 173
Slave Select Synchronization ................................... 179
Sleep Operation........................................................ 181
SPI Clock .................................................................. 178
R/W Bit ............................................................. 186, 187
Significance and Initialization Condition
PSA Bit ..................................................................... 133
T0CS Bit ................................................................... 133
T0PS2:T0PS0 Bits.................................................... 133
T0SE Bit ................................................................... 133
for RCON Register ............................................. 31
2005 Microchip Technology Inc.
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