PIC18F4439-E/PT Microchip Technology, PIC18F4439-E/PT Datasheet - Page 6
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PIC18F4439-E/PT
Manufacturer Part Number
PIC18F4439-E/PT
Description
IC PIC MCU FLASH 6KX16 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2439-ISO.pdf
(322 pages)
3.PIC18F2439-ISO.pdf
(6 pages)
4.PIC18F2439-ISO.pdf
(34 pages)
Specifications of PIC18F4439-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
12KB (6K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
640 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
640 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4439-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18FXX39
Depending on the 4-bit command, the 16-bit operand
represents 16 bits of input data, or 8 bits of input data
and 8 bits of output data.
Throughout this specification, commands and data are
presented as illustrated in Table 2-4. The 4-bit
command is shown MSb first. The command operand,
or “Data Payload”, is shown <MSB><LSB>. Figure 2-6
demonstrates how to serially present a 20-bit
command/operand to the device.
TABLE 2-4:
FIGURE 2-6:
DS30480C-page 6
Command
SCLK
1101
SDATA
4-bit
P3
Payload
4-bit Command
3C 40
1
P2
1
Data
SAMPLE COMMAND
SEQUENCE
2
P4
0
TABLE WRITE, POST-INCREMENT TIMING (1101)
3
1
Table Write,
post-increment by 2
4
1
P2A
P5
P2B
Core Instruction
1
0
2
0
0
3
0
4
0
5
0
Preliminary
SDATA = Input
6
0
16-bit Data Payload
4
7
1
8
0
2.6.2
The core instruction passes a 16-bit instruction to the
CPU core for execution. This is needed to setup
registers as appropriate for use with other commands.
9
0
10 11
0
C
1
12
1
CORE INSTRUCTION
13
1
14
1
3
15 16
0
2010 Microchip Technology Inc.
0
P5A
Fetch Next 4-bit Command
1
n
2
n
3
n
4
n