DSPIC30F6011T-20I/PF Microchip Technology, DSPIC30F6011T-20I/PF Datasheet

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DSPIC30F6011T-20I/PF

Manufacturer Part Number
DSPIC30F6011T-20I/PF
Description
IC DSPIC MCU/DSP 132K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F6011T-20I/PF

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
132KB (44K x 24)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC30F6011T20IP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F6011T-20I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC30F6011, dsPIC30F6012,
dsPIC30F6013, dsPIC30F6014 (Rev. B1)
Silicon Errata
The dsPIC30F6011/6012/6013/6014 (Rev. B1) sam-
ples you have received were found to conform to the
specifications and functionality described in the
following documents:
• DS70030 - dsPIC30F Programmer’s Reference
• DS70117 - dsPIC30F6011, dsPIC30F6012,
• DS70046 - dsPIC30F Family Reference Manual
The exceptions to the specifications in the documents
listed above are described in this section. The specific
devices for which these exceptions are described are
listed below:
The errata in this document apply to all devices marked
with year and week codes, “04” and “06”, respectively,
or later.
The errata described in this section will be fixed in
future revisions of dsPIC30F6011, dsPIC30F6012,
dsPIC30F6013 and dsPIC30F6014 silicon.
Silicon Errata Summary
The following list summarizes the errata described in
further detail through the remainder of this document:
1.
2.
3.
4.
 2004 Microchip Technology Inc.
Manual
dsPIC30F6013, dsPIC30F6014 Data Sheet
• dsPIC30F6011
• dsPIC30F6012
• dsPIC30F6013
• dsPIC30F6014
Data EEPROM
Data EEPROM is operational at 20 MIPS.
Unsigned MAC
The unsigned integer mode for the MAC-type DSP
instructions does not function as specified.
Decimal Adjust Instruction
The Decimal Adjust instruction, DAW.b, may
improperly clear the Carry bit, C (SR<0>).
PSV Operations Using SR
In certain instructions, fetching one of the
operands from Program Memory using Program
Space Visibility (PSV) will corrupt specific bits in
the Status Register, SR.
dsPIC30F6011/6012/6013/6014 Rev. B1 Silicon Errata
Advance Information
6012/6013/6014
5.
6.
7.
8.
9.
10. Interrupting a REPEAT Loop
11. 32-bit General Purpose Timers
12. 12-bit 100 Ksps A/D Converter
13. Data Converter Interface – Slave Mode
14. DCI –Stop in Idle mode
dsPIC30F6011/
Early Termination of Nested-DO loops
When using two DO loops in a nested fashion,
terminating the inner-level DO loop by setting the
EDT(CORCON<11>) bit will produce unexpected
results.
Reset during Run-Time Self Programming
(RTSP) of Program Flash Memory
When a device reset occurs while an RTSP
operation is ongoing, code execution may lead into
an Address Error trap.
Y-Space Data Dependency
When an instruction that writes to a location in the
address range of Y-data memory is immediately
followed by a MAC-type DSP instruction that reads
a location also resident in Y-data memory, the
operations will not be performed as specified.
IPC2 SFR Write Sequence
A specific write sequence for IPC2 (Interrupt
Priority Control 2) SFR is required.
Catastrophic Overflow Traps
When a catastrophic overflow of any of the
accumulators causes an Arithmetic (math) Error
trap, the Overflow Status bits need to be cleared to
exit the trap handler.
When a REPEAT loop is interrupted by two or more
interrupts in a nested fashion an Address Error
Trap may be caused.
The 32-bit General Purpose Timers do not function
as specified for prescaler ratios other than 1:1.
The 12-bit A/D converter scans one channel less
than that specified when configured to perform
channel scanning on MUX A inputs and alternately
converting a fixed MUX B input.
In Slave mode, the DCI module does not function
correctly when data communication is configured
to start one serial clock after the frame
synchronization pulse.
The DCI module should not be stopped when the
device enters Idle mode.
DS80183D-page 1

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DSPIC30F6011T-20I/PF Summary of contents

Page 1

... PSV Operations Using SR In certain instructions, fetching one of the operands from Program Memory using Program Space Visibility (PSV) will corrupt specific bits in the Status Register, SR.  2004 Microchip Technology Inc. dsPIC30F6011/ 6012/6013/6014 5. Early Termination of Nested-DO loops When using two DO loops in a nested fashion, terminating the inner-level DO loop by setting the EDT(CORCON< ...

Page 2

... NC, L0 daw.b w2 bset.b SR, #C bra L1 L0:daw.b w2 L1: .... Advance Information MAC to perform unsigned integer Instruction DAW.b ;First BCD number ;Second BCD number ;If C set ;If not,do DAW and ;set the carry bit ;and exit  2004 Microchip Technology Inc. ...

Page 3

... ASM30 assembler, the application may perform a PSV access to move the source operand from Program memory to RAM register prior to performing the operations listed in Table 1. The work around for Example 2 is demonstrated in Example 3.  2004 Microchip Technology Inc. dsPIC30F6011/6012/6013/6014 ;See Note 1 ;See Note 1 ;See Note 1 ;See Note 1 ...

Page 4

... W10 ;Perform indirect ;write via W0 to ;address >= 0x900 ;read operation ;using Y-AGU ;Load address > = ;0x900 into W0 ;Load address >= ;0x900 into W10 ;Perform indirect ;write via W0 to ;address >= 0x900 ;No operation ;read operation ;using Y-AGU  2004 Microchip Technology Inc. ...

Page 5

... There are no commas between // the quoted strings in the code // segment above.  2004 Microchip Technology Inc. dsPIC30F6011/6012/6013/6014 9. Module: Interrupt Controller –Traps Catastrophic Accumulator Overflow Traps are enabled as follows: - COVTE (INTCON1<8> SATA/SATB (CORCON <7/6> carry generated out of bit 39 in the accumulator causes a catastrophic overflow of the accumulator since the sign-bit has been destroyed ...

Page 6

... On the A/D interrupt, the A/D buffer will contain conversions from the following pins in sequence: - ADCBUF0 = AN3 - ADCBUF1 = AN6 - ADCBUF2 = AN4 - ADCBUF3 = AN6 - ADCBUF4 = AN5 - ADCBUF5 = AN6 - ADCBUF6 = AN3 - ADCBUF7 = AN6 Advance Information  2004 Microchip Technology Inc. ...

Page 7

... Data loaded into TXBUF0 contains 15 MS bits of the actual 16-bit data to be transmitted, while the MS bit of TXBUF0 is cleared. 4: Not all serial clock pulses are shown in this timing diagram.  2004 Microchip Technology Inc. dsPIC30F6011/6012/6013/6014 This work around is now demonstrated by an example. ...

Page 8

... MIPS prior to the erase operation. To ensure the device is operating at less than 10 MIPS, the application may post-scale the system clock or switch to the Internal FRC oscillator. Advance Information During Row Erase pin using a voltage regulator DD greater than or equal to 4.2V, pin and ground.  2004 Microchip Technology Inc. ...

Page 9

... Code Protection Addresses in the range, 0x6000 through 0xFFFF, may not be code protected for this revision of dsPIC30F6011 and dsPIC30F6013 silicon. Work around None.  2004 Microchip Technology Inc. dsPIC30F6011/6012/6013/6014 Work around For 5 volt applications, use a voltage regulator that ensures V to achieve 30 MIPS operation. ...

Page 10

... APPENDIX A: REVISION HISTORY Revision A (2/2004) Original version of the document. Revision B (4/2004) Document updated from “Confidential” to “Advance Information”. Revision C (5/2004) Added errata #3, #12, #13, #14 and #15. Revision D (11/2004) Added errata #4, #5 and #18. DS80183D-page 10 Advance Information  2004 Microchip Technology Inc. ...

Page 11

... PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 12

... Denmark - Ballerup Tel: 45-4420-9895 Fax: 45-4420-9910 France - Massy Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Ismaning Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 England - Berkshire Tel: 44-118-921-5869 Fax: 44-118-921-5820 09/27/04  2004 Microchip Technology Inc. ...

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