DSPIC30F6012T-20I/PF Microchip Technology, DSPIC30F6012T-20I/PF Datasheet - Page 217

• Manufacturer Part Number: DSPIC30F6012T-20I/PF
• Description: IC DSPIC MCU/DSP 144K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6012T-20I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F6012T20IP

INDEX
Numerics
12-bit Analog-to-Digital Converter (A/D) Module .............. 133
A
A/D .................................................................................... 133
AC Characteristics ............................................................ 183
AC Temperature and Voltage Specifications .................... 183
AC-Link Mode Operation .................................................. 130
Address Generator Units .................................................... 39
Alternate Vector Table ........................................................ 49
Analog-to-Digital Converter. See A/D.
Assembler
Automatic Clock Stretch...................................................... 98
B
Bandgap Start-up Time
Barrel Shifter ....................................................................... 23
Bit-Reversed Addressing .................................................... 42
Block Diagrams
 2004 Microchip Technology Inc.
Aborting a Conversion .............................................. 135
ADCHS Register ....................................................... 133
ADCON1 Register..................................................... 133
ADCON2 Register..................................................... 133
ADCON3 Register..................................................... 133
ADCSSL Register ..................................................... 133
ADPCFG Register..................................................... 133
Configuring Analog Port Pins.............................. 64, 138
Connection Considerations....................................... 138
Conversion Operation ............................................... 134
Effects of a Reset...................................................... 137
Operation During CPU Idle Mode ............................. 137
Operation During CPU Sleep Mode.......................... 137
Output Formats ......................................................... 137
Power-down Modes .................................................. 137
Programming the Sample Trigger............................. 135
Register Map............................................................. 139
Result Buffer ............................................................. 134
Sampling Requirements............................................ 136
Selecting the Conversion Clock ................................ 135
Selecting the Conversion Sequence......................... 134
Load Conditions ........................................................ 183
16-bit Mode ............................................................... 130
20-bit Mode ............................................................... 130
MPASM Assembler................................................... 165
During 10-bit Addressing (STREN = 1)....................... 98
During 7-bit Addressing (STREN = 1)......................... 98
Receive Mode ............................................................. 98
Transmit Mode ............................................................ 98
Requirements............................................................ 189
Timing Characteristics .............................................. 189
Example ...................................................................... 43
Implementation ........................................................... 42
Modifier Values Table ................................................. 43
Sequence Table (16-Entry)......................................... 43
12-bit A/D Functional ................................................ 133
16-bit Timer1 Module .................................................. 70
16-bit Timer2............................................................... 75
16-bit Timer3............................................................... 75
16-bit Timer4............................................................... 80
16-bit Timer5............................................................... 80
32-bit Timer2/3............................................................ 74
32-bit Timer4/5............................................................ 79
CAN Buffers and Protocol Engine............................. 112
dsPIC30F6011/6012/6013/6014
Preliminary
BOR Characteristics ......................................................... 182
BOR. See Brown-out Reset.
Brown-out Reset
C
C Compilers
CAN Module ..................................................................... 111
CLKOUT and I/O Timing
Code Examples
Code Protection ................................................................ 141
Core Architecture
CPU Architecture Overview ................................................ 15
D
Data Accumulators and Adder/Subtractor .......................... 21
Data Address Space........................................................... 31
DCI Module............................................................... 124
Dedicated Port Structure ............................................ 63
DSP Engine ................................................................ 20
dsPIC30F6011/6012/6013/6014................................. 10
dsPIC30F6013/6014................................................... 11
External Power-on Reset Circuit .............................. 149
I
Input Capture Mode.................................................... 83
Oscillator System...................................................... 143
Output Compare Mode ............................................... 87
Reset System ........................................................... 147
Shared Port Structure................................................. 64
SPI.............................................................................. 92
SPI Master/Slave Connection..................................... 92
UART Receiver......................................................... 104
UART Transmitter..................................................... 103
Characteristics.......................................................... 181
Timing Requirements ............................................... 189
MPLAB C17.............................................................. 166
MPLAB C18.............................................................. 166
MPLAB C30.............................................................. 166
Baud Rate Setting .................................................... 116
CAN1 Register Map.................................................. 118
CAN2 Register Map.................................................. 120
Frame Types ............................................................ 111
I/O Timing Characteristics ........................................ 206
I/O Timing Requirements.......................................... 206
Message Reception.................................................. 114
Message Transmission............................................. 115
Modes of Operation .................................................. 113
Overview................................................................... 111
Characteristics.......................................................... 187
Requirements ........................................................... 187
Data EEPROM Block Erase ....................................... 58
Data EEPROM Block Write ........................................ 60
Data EEPROM Read.................................................. 57
Data EEPROM Word Erase ....................................... 58
Data EEPROM Word Write ........................................ 59
Erasing a Row of Program Memory ........................... 53
Initiating a Programming Sequence ........................... 54
Loading Write Latches................................................ 54
Overview..................................................................... 15
Data Space Write Saturation ...................................... 23
Overflow and Saturation ............................................. 21
Round Logic ............................................................... 22
Write Back .................................................................. 22
Alignment.................................................................... 34
Alignment (Figure) ...................................................... 35
Effect of Invalid Memory Accesses (Table) ................ 34
MCU and DSP (MAC Class) Instructions Example .... 34
2
C .............................................................................. 96
DS70117E-page 215