AT89C51IC2-SLSIL Atmel, AT89C51IC2-SLSIL Datasheet - Page 129
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AT89C51IC2-SLSIL
Manufacturer Part Number
AT89C51IC2-SLSIL
Description
IC 8051 MCU FLASH 32K 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.AT89C51IC2-SLRIM.pdf
(147 pages)
Specifications of AT89C51IC2-SLSIL
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
T
V
V
Notes:
4301D–8051–02/08
A
CC
CC
Symbol
I
= -40°C to +85°C; V
I
I
CCIDLE
CCProg
V
R
CCOP
C
I
I
=2.7V to 5.5V and F = 0 to 40 MHz (both internal and external code execution)
=4.5V to 5.5V and F = 0 to 60 MHz (internal code execution only) (Continued)
I
I
OH1
RST
PD
TL
IL
LI
IO
1. Operating I
2. Idle I
3. Power Down I
4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be superimposed on the V
5. Typical are based on a limited number of samples and are not guaranteed. The values listed are at room temperature and
6. Under steady state (non-transient) conditions, I
7. For other values, please contact your sales office.
8. Icc Flash Write operation current while an on-chip flash page write is on going.
9. Flash Retention is guaranteed with the same formula for V
Parameter
Output High Voltage, port 0, ALE, PSEN
RST Pulldown Resistor
Logical 0 Input Current ports 1, 2, 3, 4 and 5
Input Leakage Current for P0 only
Logical 1 to 0 Transition Current, ports 1, 2, 3, 4
Capacitance of I/O Buffer
Power Down Current
Power Supply Current on normal mode
Power Supply Current on idle mode
Power Supply Current during flash Write / Erase
V
V
53).
0.5V; XTAL2 N.C; Port 0 = V
ure 55).
and 3. The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0
transitions during bus operation. In the worst cases (capacitive loading 100pF), the noise pulse on the ALE line may exceed
0.45V with maxi V
5V.
Maximum I
Maximum I
Port 0: 26 mA
Ports 1, 2 and 3: 15 mA
Maximum total I
If I
than the listed test conditions.
SS
IH
OL
= V
+ 0.5V,
CC
exceeds the test condition, V
CC
is measured with all output pins disconnected; XTAL1 driven with T
- 0.5V; XTAL2 N.C.; EA = RST = Port 0 = V
OL
OL
CC
SS
per port pin: 10 mA
per 8-bit port:
CC
is measured with all output pins disconnected; XTAL1 driven with T
= 0V;
OL
is measured with all output pins disconnected; EA = V
OL
for all output pins: 71 mA
peak 0.6V. A Schmitt Trigger use is not necessary.
CC
; EA = RST = V
OL
may exceed the related specification. Pins are not guaranteed to sink current greater
SS
OL
V
V
V
0.9 V
CC
CC
CC
(see Figure 54).
Min
must be externally limited as follows:
50
- 0.3
- 0.7
- 1.5
CC
CC
. I
CC
CC
(MHz) + 20
Frequency
would be slightly higher if a crystal oscillator used (see Figure
Min down to 0.
200
Typ
0.4 x
100
(5)
SS
0.4 x Frequency (MHz) + 5
0.3 x Frequency (MHz) + 5
, PORT 0 = V
CLCH
, T
Max
-650
CLCH
250
±10
150
CHCL
-50
10
, T
CC
= 5 ns, V
CHCL
; XTAL2 NC.; RST = V
= 5 ns (see Figure 56.), V
IL
Unit
= V
mA
mA
mA
kΩ
µA
µA
µA
pF
µA
V
V
V
V
OL
SS
s of ALE and Ports 1
Test Conditions
V
I
I
I
VCC = 2.7V to 5.5V
I
V
0.45V < V
V
Fc = 3 MHz
T
4.5V < V
V
V
V
+ 0.5V, V
OH
OH
OH
OH
A
CC
IN
IN
CC
CC
CC
= 25°C
= -200 µA
= -3.2 mA
= -7.0 mA
= -10 µA
= 0.45V
= 2.0V
= 5V ± 10%
= 5.5V
= 5.5V
= 5.5V
SS
CC <
IN
IH
(1)
(1)
(8)
(see Fig-
< V
5.5V
= V
CC
129
CC
IL
(3)
=
-