AT89C51IC2-SLSIL Atmel, AT89C51IC2-SLSIL Datasheet - Page 25
![IC 8051 MCU FLASH 32K 44PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
AT89C51IC2-SLSIL
Manufacturer Part Number
AT89C51IC2-SLSIL
Description
IC 8051 MCU FLASH 32K 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.AT89C51IC2-SLRIM.pdf
(147 pages)
Specifications of AT89C51IC2-SLSIL
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
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Dual Data Pointer
Register
Figure 7. Use of Dual Pointer
4301D–8051–02/08
7
AUXR1(A2H)
DPS
0
The additional data pointer can be used to speed up code execution and reduce code
size.
The dual DPTR structure is a way by which the chip will specify the address of an exter-
nal data memory location. There are two 16-bit DPTR registers that address the external
memory, and a single bit called DPS = AUXR1.0 (see Table 21) that allows the program
code to switch between them (Refer to Figure 7).
Table 21. AUXR1 register
AUXR1- Auxiliary Register 1(0A2h)
Reset Value: XXXX XX0X0b
Not bit addressable
Note:
Number
Bit
7
-
7
6
5
4
3
2
1
0
*Bit 2 stuck at 0; this allows to use INC AUXR1 to toggle DPS without changing GF3.
DPH(83H) DPL(82H)
Mnemonic Description
ENBOOT
DPS
GF3
Bit
6
-
0
-
-
-
-
DPTR1
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Enable Boot Flash
Cleared to disable boot rom.
Set to map the boot rom between F800h - 0FFFFh.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
This bit is a general purpose user flag.*
Always cleared.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Data Pointer Selection
Cleared to select DPTR0.
Set to select DPTR1.
ENBOOT
DPTR0
5
4
-
GF3
3
External Data Memory
2
0
1
-
DPS
0
25
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