ATMEGA8515L-8JJ Atmel, ATMEGA8515L-8JJ Datasheet - Page 167
![IC MCU AVR 8K 5V 8MHZ 44-PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
ATMEGA8515L-8JJ
Manufacturer Part Number
ATMEGA8515L-8JJ
Description
IC MCU AVR 8K 5V 8MHZ 44-PLCC
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8515L-8JJ
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
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RWW – Read-While-Write
Section
NRWW – No Read-While-Write
Section
2512K–AVR–01/10
Note that the user software can never read any code that is located inside the RWW
section during a Boot Loader software operation. The syntax “Read-While-Write sec-
tion” refers to which section that is being programmed (erased or written), not which
section that actually is being read during a Boot Loader software update.
If a Boot Loader software update is programming a page inside the RWW section, it is
possible to read code from the Flash, but only code that is located in the NRWW sec-
tion. During an on-going programming, the software must ensure that the RWW section
never is being read. If the user software is trying to read code that is located inside the
RWW section (i.e., by a rcall/rjmp/lpm or an interrupt) during programming, the software
might end up in an unknown state. To avoid this, the interrupts should either be disabled
or moved to the Boot Loader section. The Boot Loader section is always located in the
NRWW section. The RWW Section Busy bit (RWWSB) in the Store Program memory
Control Register (SPMCR) will be read as logical one as long as the RWW section is
blocked for reading. After a programming is completed, the RWWSB must be cleared by
software before reading code located in the RWW section. See “Store Program memory
Control Register – SPMCR” on page 170. for details on how to clear RWWSB.
The code located in the NRWW section can be read when the Boot Loader software is
updating a page in the RWW section. When the Boot Loader code updates the NRWW
section, the CPU is halted during the entire page erase or page write operation.
Table 73. Read-While-Write Features
Figure 72. Read-While-Write vs. No Read-While-Write
pointer Address during the
Which Section does the Z-
Z-pointer
Addresses RWW
Section
Code Located in
NRWW Section
Can be Read during
the Operation
Programming?
NRWW section
RWW section
Which Section Can be
Read-While-Write
No Read-While-Write
(RWW) Section
(NRWW) Section
Programming?
NRWW section
Read during
None
ATmega8515(L)
Is the CPU
Halted?
Yes
No
Z-pointer
Addresses NRWW
Section
CPU is Halted
during the Operation
Read-While-
Supported?
Write
Yes
No
167
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