TS87C52X2-VCA Atmel, TS87C52X2-VCA Datasheet - Page 23
![IC MCU 8BIT 8K OTP 40MHZ 40-DIP](/photos/6/70/67049/453-40-dip_sml.jpg)
TS87C52X2-VCA
Manufacturer Part Number
TS87C52X2-VCA
Description
IC MCU 8BIT 8K OTP 40MHZ 40-DIP
Manufacturer
Atmel
Series
87Cr
Datasheet
1.TS87C52X2-VCA.pdf
(55 pages)
Specifications of TS87C52X2-VCA
Core Processor
8051
Core Size
8-Bit
Speed
60/30MHz
Connectivity
UART/USART
Peripherals
POR
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
4184G–8051–09/06
are received simultaneously, an internal polling sequence determines which request is
serviced. Thus within each priority level there is a second priority structure determined
by the polling sequence.
Table 12. IE Register
IE - Interrupt Enable Register (A8h)
Reset Value = 0X00 0000b
Bit addressable
Number
Bit
EA
7
6
5
4
3
2
1
0
7
Mnemonic Description
EX1
EX0
ET2
ET1
ET0
Bit
EA
ES
-
6
-
Enable All interrupt bit
Clear to disable all interrupts.
Set to enable all interrupts.
If EA=1, each interrupt source is individually enabled or disabled by setting or
clearing its own interrupt enable bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Timer 2 overflow interrupt Enable bit
Clear to disable timer 2 overflow interrupt.
Set to enable timer 2 overflow interrupt.
Serial port Enable bit
Clear to disable serial port interrupt.
Set to enable serial port interrupt.
Timer 1 overflow interrupt Enable bit
Clear to disable timer 1 overflow interrupt.
Set to enable timer 1 overflow interrupt.
External interrupt 1 Enable bit
Clear to disable external interrupt 1.
Set to enable external interrupt 1.
Timer 0 overflow interrupt Enable bit
Clear to disable timer 0 overflow interrupt.
Set to enable timer 0 overflow interrupt.
External interrupt 0 Enable bit
Clear to disable external interrupt 0.
Set to enable external interrupt 0.
ET2
5
ES
4
ET1
3
EX1
2
TS8xCx2X2
ET0
1
EX0
0
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