AT91M40800-33AI SL383 Atmel, AT91M40800-33AI SL383 Datasheet - Page 29
![IC ARM MCU 16BIT 100TQFP](/photos/6/70/67048/313-100-tqfp_sml.jpg)
AT91M40800-33AI SL383
Manufacturer Part Number
AT91M40800-33AI SL383
Description
IC ARM MCU 16BIT 100TQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91M40800-33AU.pdf
(18 pages)
2.AT91R40807-33AI.pdf
(153 pages)
3.AT91M40800-33AI.pdf
(21 pages)
Specifications of AT91M40800-33AI SL383
Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
AT91M4080033AISL3
- Current page: 29 of 153
- Download datasheet (2Mb)
Wait States
Standard Wait States
1354D–ATARM–08/02
Figure 17. Data Hold Time
In early read protocol the data can remain valid longer than in standard read protocol
due to the additional wait cycle which follows a write access.
The EBI can automatically insert wait states. The different types of wait states are listed
below:
•
•
•
•
•
Each chip select can be programmed to insert one or more wait states during an access
on the corresponding device. This is done by setting the WSE field in the corresponding
EBI_CSR. The number of cycles to insert is programmed in the NWS field in the same
register.
Below is the correspondence between the number of standard wait states programmed
and the number of cycles during which the NWE pulse is held low:
For each additional wait state programmed, an additional cycle is added.
Standard wait states
Data float wait states
External wait states
Chip select change wait states
Early read wait states (see “Read Protocols” )
0 wait states1/2 cycle
1 wait state1 cycle
Data Output
ADDR
NWE
MCK
AT91X40 Series
29
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