PIC18LF8390T-I/PT Microchip Technology, PIC18LF8390T-I/PT Datasheet - Page 155
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PIC18LF8390T-I/PT
Manufacturer Part Number
PIC18LF8390T-I/PT
Description
IC PIC MCU FLASH 4KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Specifications of PIC18LF8390T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
Number Of I /o
66
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, EUSART, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF8390T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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14.4
In Pulse-Width Modulation (PWM) mode, the CCP2 pin
produces up to a 10-bit resolution PWM output. Since
the CCP2 pin is multiplexed with a PORTC or PORTE
data latch, the appropriate TRIS bit must be cleared to
make the CCP2 pin an output.
Figure 14-4 shows a simplified block diagram of the
CCP2 module in PWM mode.
For a step-by-step procedure on how to set up the CCP
module for PWM operation, see Section 14.4.3
“Setup for PWM Operation”.
FIGURE 14-4:
© 2007 Microchip Technology Inc.
Note 1: The 8-bit TMR2 value is concatenated with the 2-bit
Note:
CCPR2H (Slave)
CCPR2L
Comparator
Duty Cycle Registers
TMR2
PR2
Comparator
PWM Mode
internal Q clock, or 2 bits of the prescaler, to create the
10-bit time base.
Clearing the CCP2CON register will force
the RC1 or RE7 output latch (depending
on device configuration) to the default low
level. This is not the PORTC or PORTE
I/O data latch.
(Note 1)
Clear Timer,
CCP2 pin and
latch D.C.
SIMPLIFIED PWM BLOCK
DIAGRAM
CCP2CON<5:4>
R
S
Q
TRISC<2>
PIC18F6390/6490/8390/8490
CCP2
A PWM output (Figure 14-5) has a time base (period)
and a time that the output stays high (duty cycle). The
frequency of the PWM is the inverse of the period
(1/period).
FIGURE 14-5:
14.4.1
The PWM period is specified by writing to the PR2
register. The PWM period can be calculated using the
following formula:
EQUATION 14-1:
PWM frequency is defined as 1/[PWM period].
When TMR2 is equal to PR2, the following three events
occur on the next increment cycle:
• TMR2 is cleared
• The CCP2 pin is set (exception: if PWM duty
• The PWM duty cycle is latched from CCPR2L into
cycle = 0%, the CCP2 pin will not be set)
CCPR2H
Note:
PWM Period = (PR2) + 1] • 4 • T
TMR2 = PR2
Duty Cycle
PWM PERIOD
The Timer2 postscalers (see Section 12.0
“Timer2 Module”) are not used in the
determination of the PWM frequency. The
postscaler could be used to have a servo
update rate at a different frequency than
the PWM output.
Period
TMR2 = Duty Cycle
(TMR2 Prescale Value)
PWM OUTPUT
TMR2 = PR2
DS39629C-page 153
OSC
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