PIC18LF8390T-I/PT Microchip Technology, PIC18LF8390T-I/PT Datasheet - Page 260
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PIC18LF8390T-I/PT
Manufacturer Part Number
PIC18LF8390T-I/PT
Description
IC PIC MCU FLASH 4KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Specifications of PIC18LF8390T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
Number Of I /o
66
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, EUSART, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF8390T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18F6390/6490/8390/8490
22.1
The LCD driver module has 32 registers:
• LCD Control Register (LCDCON)
• LCD Phase Register (LCDPS)
• Six LCD Segment Enable Registers
• 24 LCD Data Registers
The LCDCON register, shown in Register 22-1,
controls the overall operation of the module. Once the
module is configured, the LCDEN (LCDCON<7>) bit is
REGISTER 22-1:
DS39629C-page 258
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-2
bit 1-0
(LCDSE5:LCDSE0)
(LCDDATA23:LCDDATA0)
LCDEN
R/W-0
LCD Registers
LCDEN: LCD Driver Enable bit
1 = LCD driver module is enabled
0 = LCD driver module is disabled
SLPEN: LCD Driver Enable in Sleep mode bit
1 = LCD driver module is disabled in Sleep mode
0 = LCD driver module is enabled in Sleep mode
WERR: LCD Write Failed Error bit
1 = LCDDATAx register written while LCDPS<WA> = 0 (must be cleared in software)
0 = No LCD write error
Unimplemented: Read as ‘0’
CS1:CS0: Clock Source Select bits
00 = (F
01 = T13CKI (Timer1)/32
1x = INTRC (31.25 kHz)/32
LMUX1:LMUX0: Commons Select bits
LMUX1:LMUX0
SLPEN
R/W-0
LCDCON: LCD CONTROL REGISTER
OSC
00
01
10
11
/4)/8192
C = Clearable Only bit
W = Writable bit
‘1’ = Bit is set
WERR
R/C-0
1/2 (COM1:COM0)
1/3 (COM2:COM0)
1/4 (COM3:COM0)
Static (COM0)
Multiplex
U-0
—
(PIC18F6X90)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
Number of
Maximum
Pixels
R/W-0
used to enable or disable the LCD module. The LCD
panel can also operate during Sleep by clearing the
SLPEN (LCDCON<6>) bit.
The
configures the LCD clock source prescaler and the type
of waveform, Type-A or Type-B. Details on these
features are provided in Section 22.2 “LCD Clock
Source Selection”, Section 22.3 “LCD Bias Types”
and Section 22.8 “LCD Waveform Generation”.
128
CS1
32
64
96
LCDPS
(PIC18F8X90)
Number of
Maximum
R/W-0
Pixels
CS0
144
192
48
96
register,
© 2007 Microchip Technology Inc.
x = Bit is unknown
shown
LMUX1
R/W-0
1/2 or 1/3
1/2 or 1/3
Static
Bias
1/3
in
Register 22-2,
LMUX0
R/W-0
bit 0
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