ACE1101BEMT8X Fairchild Semiconductor, ACE1101BEMT8X Datasheet

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ACE1101BEMT8X

Manufacturer Part Number
ACE1101BEMT8X
Description
IC MCU 1KBIT EEPROM 8TSSOP
Manufacturer
Fairchild Semiconductor
Series
ACEX® 11xxr
Datasheet

Specifications of ACE1101BEMT8X

Core Processor
ACE1001
Core Size
8-Bit
Speed
4MHz
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
1KB (1K x 8)
Program Memory Type
EEPROM
Eeprom Size
64 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
© 2001 Fairchild Semiconductor Corporation
ACE1101 Product Family Rev. B.2
The ACE1101 (Arithmetic Controller Engine) family of
microcontrollers is a dedicated programmable monolithic inte-
grated circuit for applications requiring high performance, low
power, and small size. It is a fully static part fabricated using
CMOS technology.
The ACE1101 product family has an 8-bit microcontroller core, 64
bytes of RAM, 64 bytes of data EEPROM and 1K bytes of code
EEPROM. Its on-chip peripherals include a multi-function 16-bit
timer, watchdog/idle timer, and programmable under-voltage
detection circuitry. On-chip clock and reset functions reduce the
number of required external components. The ACE1101 product
family is available in 8-pin TSSOP, 8-pin DIP and 14-pin DIP
packages.
I Arithmetic Controller Engine
I 1K bytes on-board code EEPROM
I 64 bytes data EEPROM
I 64 bytes RAM
I Watchdog
I Multi-input wake-up on all I/O pins
I 16-bit multifunction timer
G3(Input only)
1. 100nf Decoupling capacitor recommended
2. Available only in the 14-pin package option.
G0 (CKO)
G1 (CKI)
RESET
G2 (T1)
GND
V CC
G6
G7
G4
G5
1
1
2
2
2
purpose
wakeup
general
G port
multi-
input
with
I/O
Low Battery/Brown-out
1K bytes of CODE
Programming
Power-on
ACE1101
EEPROM
Interface
I On-chip oscillator
I On-chip Power-on Reset
I Brown-out Reset
I Programmable read and write disable functions
I Memory mapped I/O
I Multi-level Low Voltage Detection
I Fully static CMOS
I Single supply operation
I Software selectable I/O options
I 40 years data retention
I 1,000,000 writes
I 8-pin TSSOP, 8 and 14-pin DIP packages. (SOIC and CSP
I In-circuit programming
Control
Detect
Reset
Unit
— No external components
— 1µs instruction cycle time
— Low power HALT mode (100nA @ 3.3V)
— Power saving IDLE mode
— 1.8-5.5V (ACE1101L)
— 2.2-5.5V (ACE1101)
— 2.7-5.5V (ACE1101B)
— Push-pull outputs with tri-state option
— Weak pull-up or high impedance inputs
packages available upon request)
64 bytes of DATA
16-Bit Timer 1
Power saving
12-Bit Timer 0
HALT/IDLE
Watchdog/
RAM block
EEPROM
Oscillator
64 bytes
Modes
Internal
August 2001
www.fairchildsemi.com

Related parts for ACE1101BEMT8X

ACE1101BEMT8X Summary of contents

Page 1

... 100nf Decoupling capacitor recommended 2. Available only in the 14-pin package option. © 2001 Fairchild Semiconductor Corporation ACE1101 Product Family Rev. B.2 I On-chip oscillator — No external components — 1µs instruction cycle time I On-chip Power-on Reset I Brown-out Reset I Programmable read and write disable functions ...

Page 2

Optional LED ACE1101 Product Family Rev. B ...

Page 3

Ambient Storage Temperature Input Voltage not including G3 G3 Input Voltage Lead Temperature (10s max) Electrostatic Discharge on all pins ACE1101 ACE1101E ACE1101V ACE1101B ACE1101BE ACE1101BV ACE1101L ACE1101 Product Family Rev. B.2 -65°C to +150°C Relative Humidity (non-condensing) -0.3V to ...

Page 4

V = 2.2/2.7/1.8 to 5.5V CC All measurements valid for ambient operating temperature range unless otherwise stated Supply Current – data EEPROM write in progress I HALT Mode current CCH 4 I IDLE Mode Current CCL ...

Page 5

V = 2.2/2.7/1.8 to 5.5V CC All measurements valid for ambient operating temperature range unless otherwise stated. Instruction cycle time from internal clock - setpoint Internal clock voltage dependent frequency variation Internal clock temperature dependent frequency variation Internal clock frequency ...

Page 6

V = 2.2/1.8 to 5.5V CC The following characteristics are guaranteed by design but are not 100% tested. LBD Voltage Threshold V = 2.2 to 5.5V CC The following characteristics are guaranteed by design but are not 100% tested. BOR ...

Page 7

ACE1101 Product Family Rev. B.2 5.6k/100pF 6.8K/100pF 5.6k/100pF 6.8K/100pF ° Avg Min Max Avg Min Max www.fairchildsemi.com ...

Page 8

BATT min BATT t S min t S actual t S max S VCC ACE1101 Product Family Rev. B actual S max Supply Voltage Battery Voltage (Nominal Operating ...

Page 9

ACE1101 Product Family Rev. B.2 ° ° www.fairchildsemi.com ...

Page 10

ACE1101 Product Family Rev. B.2 ° www.fairchildsemi.com ...

Page 11

ACE1101 Product Family Rev. B.2 ° www.fairchildsemi.com ...

Page 12

The ACEx microcontroller core is specifically designed for low cost applications involving bit manipulation, shifting block encryp- tion based on a modified Harvard architecture meaning peripheral, I/O, and RAM locations are addressed separately from instruction data. The core ...

Page 13

The Accumulator is a general-purpose 8-bit register that is used to hold data and results of arithmetic calculations or data manipu- lations. The X-Pointer register allows for an 11-bit indexing value to be added to an 8-bit offset creating an ...

Page 14

Table 11). This process takes five instruction cycles. At the end of the interrupt service routine, a return from interrupt (RETI) instruction is executed. The RETI instruction causes the ...

Page 15

M ACE1101 Product Family Rev. B ...

Page 16

ADC A, [X] 1 ADC ADC ADD A, [X] 1 ADD ADD AND A, [X] 1 AND AND CLR X 1 CLR ...

Page 17

All I/O ports, peripheral registers and core registers, except the accumulator and the program counter are mapped into memory space. 0x00 - 0x3F Data 0x40 - 0x7F Data 0xAA Data 0xAB Data 0xAC Data 0xAD Data 0xAE Data 0xAF Data ...

Page 18

The ACEx microcontroller device has 64 bytes of SRAM and 64 bytes of EEPROM available for data storage. The device also has 1K bytes of EEPROM for program storage. Software can read and write to SRAM and data EEPROM but ...

Page 19

Timer versatile 16-bit timer that can operate in one of three modes: • (PWM) mode, which generates pulses of a specified width and duty cycle • mode, which counts occurrences of an external event • mode, which ...

Page 20

In the PWM mode, the timer counts down at the instruction clock rate. When an underflow occurs, the timer register is reloaded from T1RA and the count down proceeds from the loaded value. At every underflow, a pending flag (T1PND) ...

Page 21

The External Event Counter mode operates similarly to the PWM mode; however, the timer is not clocked by the instruction clock but by transitions of the T1 input signal. The edge is selectable through the T1C1 bit of the T1CNTRL ...

Page 22

In the Input Capture mode, the timer is used to measure elapsed time between edges of an input signal. Once the timer is configured for this mode, the timer starts counting down immediately at the instruction clock rate. The Timer ...

Page 23

Timer 12-bit free running idle timer. Upon power-up or any reset, the timer is reset to 0x000 and then counts up continuously based on the instruction clock of 1MHz (1 µs). Software cannot read from or write ...

Page 24

The Multi-Input Wakeup (MIW)/Interrupt contains three memory- mapped registers associated with this circuit: WKEDG (Wakeup Edge), WKEN (Wakeup Enable), and WKPND (Wakeup Pending). Each register has 8-bits with each bit corresponding to an input pins as shown in Figure 20. ...

Page 25

The six I/O pins (eight on 14-pin package option) are bi-directional (see Figure 22) with the exception of G3 which is always an input with weak pull-up. The bi-directional I/O pins can be individually configured by software to operate as ...

Page 26

The ACEx microcontroller supports in-circuit programming of the internal data EEPROM, code EEPROM, and the initialization regis- ters. An externally controlled four wire interface consisting of a LOAD control pin (G3), a serial data SHIFT-IN input pin (G4), a serial ...

Page 27

SV1 SV2 LOAD (G3) enter prog. mode CLOCK (G1) SHIFT_IN (G4) bit 31 SHIFT_OUT (G2) (in write mode) SHIFT_OUT (G2) (in read mode) A: start of programming cycle CLOCK (G1) SHIFT_IN (G4) SHIFT_OUT (G2) ACE1101 Product Family ...

Page 28

The Brown-out Reset (BOR) and Low Battery Detect (LBD) circuits on the ACEx microcontroller have been designed to offer two types of voltage reference comparators. The sections below will describe the functionality of both circuits. Vcc 1. 2.2V ...

Page 29

When a RESET sequence is initiated, all I/O registers will be reset setting all I/Os to high-impedence inputs. The system clock is restarted after the required clock start-up delay. A reset is gener- ated by any one of the following ...

Page 30

The HALT mode is a power saving feature that almost completely shuts down the device for current conservation. The device is placed into HALT mode by setting the HALT enable bit (EHALT) of the HALT register through software ...

Page 31

... ACE1101EN14 X X ACE1101VMT8 X X ACE1101VMT8X X X ACE1101VN X X ACE1101VN14 X X ACE1101BMT8 X X ACE1101BMT8X X X ACE1101BN X X ACE1101BN14 X X ACE1101BEMT8 X X ACE1101BEMT8X X X ACE1101BEN X X ACE1101BEN14 X X ACE1101BVMT8 X X ACE1101BVMT8X X X ACE1101BVN X X ACE1101BVN14 X X ACE1101LMT8 X X ACE1101LMT8X X X ACE1101LN X X ACE1101LN14 ...

Page 32

Pin #1 IDENT 0.0433 Max (1.1) 0.0256 (0.65) Typ. Notes: Unless otherwise specified 1. Reference ...

Page 33

Pin #1 IDENT 0.280 MIN (7.112) 0.300 - 0.320 (7.62 - 8.128) 95° ± 5° 0.009 - 0.015 (0.229 - 0.381) +0.040 0.325 -0.015 +1.016 8.255 -0.381 ACE1101 Product Family Rev. B.2 0.373 - ...

Page 34

ACE1101 Product Family Rev. B.2 www.fairchildsemi.com ...

Page 35

... Fairchild's products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of Fairchild Semiconductor Corporation. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support ...

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