AT87C51RC2-RLTUL Atmel, AT87C51RC2-RLTUL Datasheet - Page 41

IC 8051 MCU 32K OTP 30MHZ 44VQFP

AT87C51RC2-RLTUL

Manufacturer Part Number
AT87C51RC2-RLTUL
Description
IC 8051 MCU 32K OTP 30MHZ 44VQFP
Manufacturer
Atmel
Series
87Cr
Datasheet

Specifications of AT87C51RC2-RLTUL

Core Processor
8051
Core Size
8-Bit
Speed
30/20MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
UART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT87C51RC2-RLTUL
Manufacturer:
Atmel
Quantity:
10 000
4188F–8051–01/08
Table 6-16.
A low-priority interrupt can be interrupted by a high priority interrupt, but not by another low-prior-
ity interrupt. A high-priority interrupt can’t be interrupted by any other interrupt source.
If two interrupt requests of different priority levels are received simultaneously, the request of
higher priority level is serviced. If interrupt requests of the same priority level are received simul-
taneously, an internal polling sequence determines which request is serviced. Thus within each
priority level there is a second priority structure determined by the polling sequence.
Table 6-17.
Reset Value = 0000 0000b
Bit addressable
Bit Number Bit
IPH.x
EA
0
0
1
1
7
6
5
4
3
2
1
0
7
Priority Level Bit Values
IE Register
IE - Interrupt Enable Register (A8h)
EC
6
EX1
EX0
ET2
ET1
ET0
IP.x
Mnemonic Description
EA
EC
ES
0
1
0
1
ET2
5
Enable All interrupt bit
Clear to disable all interrupts.
Set to enable all interrupts.
If EA=1, each interrupt source is individually enabled or disabled by setting or
clearing its own interrupt enable bit.
PCA interrupt enable bit
Clear to disable . Set to enable.
Timer 2 overflow interrupt Enable bit
Clear to disable timer 2 overflow interrupt.
Set to enable timer 2 overflow interrupt.
Serial port Enable bit
Clear to disable serial port interrupt.
Set to enable serial port interrupt.
Timer 1 overflow interrupt Enable bit
Clear to disable timer 1 overflow interrupt.
Set to enable timer 1 overflow interrupt.
External interrupt 1 Enable bit
Clear to disable external interrupt 1.
Set to enable external interrupt 1.
Timer 0 overflow interrupt Enable bit
Clear to disable timer 0 overflow interrupt.
Set to enable timer 0 overflow interrupt.
External interrupt 0 Enable bit
Clear to disable external interrupt 0.
Set to enable external interrupt 0.
ES
4
ET1
Interrupt Level Priority
3
3 (Highest)
0 (Lowest)
1
2
EX1
AT/TS8xC51Rx2
2
ET0
1
EX0
0
41

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