AT91M63200-25AU Atmel, AT91M63200-25AU Datasheet - Page 114

• Manufacturer Part Number: AT91M63200-25AU
• Description: IC MCU ARM7 176-TQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91M63200-25AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 58
• Program Memory Type: OTP
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-TQFP, 176-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Clock Control
The clock of each counter can be controlled in two different
ways: it can be enabled/disabled and started/stopped.
•
•
Figure 55. Clock Control
114
Selected
Counter
Clock
Clock
The clock can be enabled or disabled by the user with
the CLKEN and the CLKDIS commands in the Control
Register. In capture mode, it can be disabled by an RB
load event if LDBDIS is set to 1 in TC_CMR. In waveform
mode, it can be disabled by an RC Compare event if
CPCDIS is set to 1 in TC_CMR. When disabled, the start
or the stop actions have no effect: only a CLKEN
command in the Control Register can re-enable the
clock. When the clock is enabled, the CLKSTA bit is set
in the Status Register.
The clock can also be started or stopped: a trigger
(software, synchro, external or compare) always starts
the clock. The clock can be stopped by an RB load event
in capture mode (LDBSTOP = 1 in TC_CMR) or an RC
compare event in waveform mode (CPCSTOP = 1 in
TC_CMR). The start and the stop commands have an
effect only if the clock is enabled.
Q
R
S
AT91M63200
Trigger
CLKSTA
Q
CLKEN
R
S
Event
Stop
CLKDIS
Disable
Event
Timer/Counter Operating Modes
Each Timer/Counter channel can independently operate in
two different modes:
•
•
The Timer/Counter mode is programmed with the WAVE
bit in the TC Mode Register. In capture mode, TIOA and
TIOB are configured as inputs. In waveform mode, TIOA is
always configured to be an output and TIOB is an output if
it is not selected to be the external trigger.
Trigger
A trigger resets the counter and starts the counter clock.
Three types of triggers are common to both modes, and a
fourth external trigger is available to each mode.
The following triggers are common to both modes:
•
•
•
The Timer/Counter channel can also be configured to have
an external trigger. In capture mode, the external trigger
signal can be selected between TIOA and TIOB. In wave-
form mode, an external event can be programmed on one
of the following signals: TIOB, XC0, XC1 or XC2. This
external event can then be programmed to perform a trig-
ger by setting ENETRG in TC_CMR.
If an external trigger is used, the duration of the pulses
must be longer than the system clock (MCKI) period in
order to be detected.
Capture mode allows measurement on signals
Waveform mode allows wave generation
Software trigger: Each channel has a software trigger,
available by setting SWTRG in TC_CCR.
SYNC: Each channel has a synchronization signal
SYNC. When asserted, this signal has the same effect
as a software trigger. The SYNC signals of all channels
are asserted simultaneously by writing TC_BCR (Block
Control) with SYNC set.
Compare RC trigger: RC is implemented in each
channel and can provide a trigger when the counter
value matches the RC value if CPCTRG is set in
TC_CMR.