ATTINY44V-10MU Atmel, ATTINY44V-10MU Datasheet - Page 67
![IC MCU AVR 4K FLASH 10MHZ 20-QFN](/photos/6/87/68751/313-20-qfn_sml.jpg)
ATTINY44V-10MU
Manufacturer Part Number
ATTINY44V-10MU
Description
IC MCU AVR 4K FLASH 10MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY44V-10MU
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-MLF®, QFN
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
20MLF
Device Core
AVR
Family Name
ATtiny
Maximum Speed
10 MHz
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY44V-10MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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10.3
10.3.1
10.3.2
10.3.3
8006K–AVR–10/10
Register Description
MCUCR – MCU Control Register
PORTA – Port A Data Register
DDRA – Port A Data Direction Register
Table 10-9.
1.
2.
• Bit 6 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
figuring the Pin” on page 55
Bit
Read/Write
Initial Value
Bit
0x1B (0x3B)
Read/Write
Initial Value
Bit
0x1A (0x3A)
Read/Write
Initial Value
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
EXT_OSC = crystal oscillator or low frequency crystal oscillator is selected as system clock.
EXT_CLOCK = external clock is selected as system clock.
PB1/XTAL2/PCINT9
EXT_OSC
0
EXT_OSC
0
EXT_OSC
0
0
EXT_OSC
PCINT9 • PCIE1
EXT_OSC
PCINT9 Input
XTAL2
PORTA7
BODS
Overriding Signals for Alternate Functions in PB1:PB0
R/W
DDA7
R/W
R/W
7
0
7
0
7
0
(1)
(1)
(1)
(1)
(1)
PORTA6
+
• PCINT9 • PCIE1
DDA6
PUD
R/W
R/W
R/W
6
0
6
0
6
0
for more details about this feature.
PORTA5
DDA5
R/W
R/W
R/W
5
0
SE
5
0
5
0
PORTA4
DDA4
R/W
R/W
4
0
4
0
SM1
R/W
4
0
PB0/XTAL1/PCINT8
EXT_CLOCK
0
EXT_CLOCK
0
EXT_CLOCK
0
0
EXT_CLOCK
(PCINT8 • PCIE1)
( EXT_CLOCK
(EXT_CLOCK
CLOCK/PCINT8 Input
XTAL1
PORTA3
DDA3
R/W
R/W
3
0
3
0
SM0
R/W
3
0
(2)
(2)
(2)
(2)
(2)
(2)
PORTA2
DDA2
+ EXT_OSC
+ EXT_OSC
+ EXT_OSC
+ EXT_OSC
R/W
BODSE
R/W
• EXT_OSC
• PWR_DOWN ) +
2
0
2
0
R/W
2
0
ATtiny24/44/84
PORTA1
DDA1
R/W
ISC01
R/W
1
0
1
0
(1)
(1)
(1)
(1)
R
1
0
(1)
+
• PCINT8 • PCIE1)
PORTA0
DDA0
ISC00
R/W
R/W
R
0
0
0
0
0
0
MCUCR
PORTA
DDRA
“Con-
67
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