ATMEGA88P-20AU Atmel, ATMEGA88P-20AU Datasheet - Page 234
![MCU AVR 8K ISP FLSH 20MHZ 32TQFP](/photos/37/62/376284/tqfp-32_sml.jpg)
ATMEGA88P-20AU
Manufacturer Part Number
ATMEGA88P-20AU
Description
MCU AVR 8K ISP FLSH 20MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA88P-20AU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
2-Wire, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
5
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
32TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
20 MHz
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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21.7.4
8025L–AVR–7/10
Slave Transmitter Mode
Figure 21-16. Formats and States in the Slave Receiver Mode
In the Slave Transmitter mode, a number of data bytes are transmitted to a Master Receiver
(see
are zero or are masked to zero.
Figure 21-17. Data Transfer in Slave Transmitter Mode
Figure
Reception of the own
slave address and one or
more data bytes. All are
acknowledged
Last data byte received
is not acknowledged
Arbitration lost as master
and addressed as slave
Reception of the general call
address and one or more data
bytes
Last data byte received is
not acknowledged
Arbitration lost as master and
addressed as slave by general call
SDA
SCL
21-17). All the status codes mentioned in this section assume that the prescaler bits
From master to slave
From slave to master
TRANSMITTER
Device 1
SLAVE
S
SLA
General Call
Device 2
RECEIVER
MASTER
W
DATA
$60
$68
$70
$78
Device 3
A
A
A
A
n
A
DATA
DATA
........
ATmega48P/88P/168P
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-Wire Serial Bus. The
prescaler bits are zero or masked to zero
Device n
$80
$90
A
A
V
CC
DATA
DATA
R1
$80
$90
$88
$98
A
A
A
A
P or S
P or S
P or S
P or S
$A0
$A0
R2
234
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