ATMEGA88P-20AU Atmel, ATMEGA88P-20AU Datasheet - Page 297
![MCU AVR 8K ISP FLSH 20MHZ 32TQFP](/photos/37/62/376284/tqfp-32_sml.jpg)
ATMEGA88P-20AU
Manufacturer Part Number
ATMEGA88P-20AU
Description
MCU AVR 8K ISP FLSH 20MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA88P-20AU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
2-Wire, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
5
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
32TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
20 MHz
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (9Mb)
27.7
27.7.1
8025L–AVR–7/10
Parallel Programming
Enter Programming Mode
Table 27-13. XA1 and XA0 Coding
Table 27-14. Command Byte Bit Coding
The following algorithm puts the device in Parallel (High-voltage) Programming mode:
1. Set Prog_enable pins listed in
2. Apply 4.5 - 5.5V between V
Ensure that V
3. Wait 20 - 60 µs, and apply 11.5 - 12.5V to RESET.
4. Keep the Prog_enable pins unchanged for at least 10µs after the High-voltage has been
5. Wait at least 300 µs before giving any parallel programming commands.
6. Exit Programming mode by power the device down or by bringing RESET pin to 0V.
If the rise time of the V
tive algorithm can be used.
1. Set Prog_enable pins listed in
2. Apply 4.5 - 5.5V between V
3. Monitor V
Command Byte
XA1
V
applied to ensure the Prog_enable Signature has been latched.
V
0
0
1
1
CC
CC
1000 0000
0100 0000
0010 0000
0001 0000
0001 0001
0000 1000
0000 0100
0000 0010
0000 0011
to 0V.
to 0V.
CC
CC
XA0
0
1
0
1
, and as soon as V
reaches at least 1.8V within the next 20 µs.
Action when XTAL1 is Pulsed
Load Flash or EEPROM Address (High or low address byte determined by BS1).
Load Data (High or Low data byte for Flash determined by BS1).
Load Command
No Action, Idle
Command Executed
Chip Erase
Write Fuse bits
Write Lock bits
Write Flash
Write EEPROM
Read Signature Bytes and Calibration byte
Read Fuse and Lock bits
Read Flash
Read EEPROM
CC
is unable to fulfill the requirements listed above, the following alterna-
CC
CC
Table 27-12 on page 296
and GND.
Table 27-12 on page 296
and GND.
CC
reaches 0.9 - 1.1V, apply 11.5 - 12.5V to RESET.
ATmega48P/88P/168P
to “0000”, RESET pin to 0V and
to “0000”, RESET pin to 0V and
297
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