Z86D7308VSC1987 Zilog, Z86D7308VSC1987 Datasheet - Page 68
Z86D7308VSC1987
Manufacturer Part Number
Z86D7308VSC1987
Description
IC 32K OTP 3 VOLT 44-PLCC
Manufacturer
Zilog
Series
Z8® IRr
Datasheet
1.Z86D7308PSC1987.pdf
(92 pages)
Specifications of Z86D7308VSC1987
Core Processor
Z8
Core Size
8-Bit
Speed
8MHz
Peripherals
Brown-out Detect/Reset, LVD, POR, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
236 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
- Current page: 68 of 92
- Download datasheet (2Mb)
PS019401-1102
Note:
Table 17. Stop-Mode Recovery Source
Stop-Mode Recovery Delay Select (D5)
This bit, if low, disables the 5 ms RESET delay after Stop-Mode Recovery. The
default configuration of this bit is 1. If the “fast” wake up is selected, the Stop-
Mode Recovery source must be kept active for at least 5 TpC.
Stop-Mode Recovery Edge Select (D6)
A 1 in this bit position indicates that a High level on any one of the recovery
sources wakes the Z86D73 from STOP Mode. A 0 indicates Low level recovery.
The default is 0 on POR.
Cold or Warm Start (D7)
This bit is read only. It is set to 1 when the device is recovered from Stop Mode.
The bit is set to 0 when the device reset is other than Stop Mode Recovery (SMR).
D4
0
0
0
0
1
1
1
1
Any Port 2 bit defined as an output drives the corresponding
input to the default state. This condition allows the remaining
inputs to control the AND/OR function. Refer to SMR2 register
on page 63 for other recover sources.
SMR:432
D3
0
0
1
1
0
0
1
1
P
D2
0
1
0
1
0
1
0
1
R
E
Description of Action
POR and/or external reset recovery
Reserved
P31 transition
P32 transition
P33 transition
P27 transition
Logical NOR of P20 through P23
Logical NOR of P20 through P27
L
I
M
I
N
Operation
A
40/44/48-Pin Low-Voltage IR OTP
R
Y
Z86D73
62
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