Z8F3201AN020EC00TR Zilog, Z8F3201AN020EC00TR Datasheet - Page 80
![IC ENCORE MCU FLASH 32K 44LQFP](/photos/6/57/65754/269-44-lqfp_sml.jpg)
Z8F3201AN020EC00TR
Manufacturer Part Number
Z8F3201AN020EC00TR
Description
IC ENCORE MCU FLASH 32K 44LQFP
Manufacturer
Zilog
Series
Encore!®r
Datasheet
1.Z8F1601VN020EC.pdf
(246 pages)
Specifications of Z8F3201AN020EC00TR
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
44-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
Z8F3201AN020EC00T
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PS017610-0404
PWM Output High Time Ratio (%)
2. Write to the Timer High and Low Byte registers to set the starting count value
3. Write to the PWM High and Low Byte registers to set the PWM value.
4. Write to the Timer Reload High and Low Byte registers to set the Reload value (PWM
5. If desired, enable the timer interrupt and set the timer interrupt priority by writing to
6. Configure the associated GPIO port pin for the Timer Output alternate function.
7. Write to the Timer Control register to enable the timer and initiate counting.
The PWM period is given by the following equation:
If an initial starting value other than
registers, the One-Shot mode equation must be used to determine the first PWM time-out
period.
If TPOL is set to 0, the ratio of the PWM output High time to the total period is given by:
If TPOL is set to 1, the ratio of the PWM output High time to the total period is given by:
PWM Output High Time Ratio (%)
Capture Mode
In Capture mode, the current timer count value is recorded when the desired external
Timer Input transition occurs. The Capture count value is written to the Timer PWM High
and Low Byte Registers. The timer input is the system clock. The TPOL bit in the Timer
Control register determines if the Capture occurs on a rising edge or a falling edge of the
PWM Period (s)
–
–
–
–
(typically
reset in PWM mode, counting always begins at the reset value of
period). The Reload value must be greater than the PWM value.
the relevant interrupt registers.
Disable the timer
Configure the timer for PWM mode.
Set the prescale value.
Set the initial logic level (High or Low) and PWM High/Low transition for the
Timer Output alternate function.
0001H
=
). This only affects the first pass in PWM mode. After the first timer
--------------------------------------------------------------------------- -
System Clock Frequency (Hz)
Reload Value
0001H
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
=
=
×
Reload Value PWM Value
----------------------------------------------------------------------- -
Prescale
--------------------------------- -
Reload Value
PWM Value
is loaded into the Timer High and Low Byte
Reload Value
–
×
100
0001H
×
100
Z8 Encore!
.
Timers
®
62
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