UPSD3433E-40U6 STMicroelectronics, UPSD3433E-40U6 Datasheet - Page 167
UPSD3433E-40U6
Manufacturer Part Number
UPSD3433E-40U6
Description
MCU 8BIT 8032 128KB FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet
1.UPSD3422EV-40U6.pdf
(300 pages)
Specifications of UPSD3433E-40U6
Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
For Use With
497-5518 - EVAL BOARD RFID READER497-5218 - KIT DEVELOPMENT FOR UPSD3400497-2381 - CABLE PROGRAMMER FLASH LINK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-4907
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPSD3433E-40U6
Manufacturer:
DENSO
Quantity:
83
Company:
Part Number:
UPSD3433E-40U6
Manufacturer:
STMicroelectronics
Quantity:
10 000
- Current page: 167 of 300
- Download datasheet (3Mb)
UPSD3422, UPSD3433, UPSD3434, UPSD3454
●
Table 114. USB IN FIFO interrupt flag (UIF1 0E9h, reset value 00h)
Table 115. UIF1 register bit definition
Bit 7
Bit
USB IN FIFO interrupt flag (UIF1)
The USB IN FIFO Interrupt Flag register (see
when an IN Endpoint FIFO that was full becomes empty. Once set, firmware must
clear the flag by writing a '0' to the appropriate bit. When FIFOs are paired, only the
odd numbered FIFO Interrupt flags are active.
–
7
6
5
4
3
2
1
0
Symbol
Bit 6
IN4F
IN3F
IN2F
IN1F
IN0F
–
–
–
–
Bit 5
R/W
R/W
R/W
R/W
R/W
R/W
–
–
–
–
Reserved
Reserved
Reserved
Endpoint 4 IN FIFO Interrupt flag
This bit is set when the FIFO status changes from full to empty.
Endpoint 3 IN FIFO Interrupt flag
This bit is set when the FIFO status changes from full to empty.
Endpoint 2 IN FIFO Interrupt flag
This bit is set when the FIFO status changes from full to empty.
Endpoint 1 IN FIFO Interrupt flag
This bit is set when the FIFO status changes from full to empty.
Endpoint 0 IN FIFO Interrupt flag
This bit is set when the FIFO status changes from full to empty.
Bit 4
IN4F
Bit 3
IN3F
Table
114) contains flags that indicate
Definition
Bit 2
IN2F
Bit 1
IN1F
USB interface
Bit 0
IN0F
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