MC68HC705C9ACP Freescale Semiconductor, MC68HC705C9ACP Datasheet - Page 55

• Manufacturer Part Number: MC68HC705C9ACP
• Description: IC MCU 2.1MHZ 16K OTP 40-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705C9ACP

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 352 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

8.3.3 Timer Registers
The timer registers (TRH and TRL), shown in
16-bit counter. Reading TRH before reading TRL causes TRL to be latched until TRL is read. Reading
TRL after reading the timer status register clears the timer overflow flag (TOF). Writing to the timer
registers has no effect.
8.3.4 Alternate Timer Registers
The alternate timer registers (ATRH and ATRL), shown in
bytes of the 16-bit counter. Reading ATRH before reading ATRL causes ATRL to be latched until ATRL
is read. Reading ATRL has no effect on the timer overflow flag (TOF). Writing to the alternate timer
registers has no effect.
Freescale Semiconductor
To prevent interrupts from occurring between readings of ATRH and ATRL,
set the interrupt flag in the condition code register before reading ATRH,
and clear the flag after reading ATRL.
Reset:
Reset:
$001A
Reset:
$001B
Reset:
$0018
$0019
ATRH
Read:
Read:
Write:
Read:
Write:
Read:
Write:
ATRL
Write
TRH
TRL
Figure 8-5. Alternate Timer Registers (ATRH and ATRL)
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
1
1
1
1
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
Figure 8-4. Timer Registers (TRH and TRL)
= Unimplemented
= Unimplemented
Bit 14
Bit 14
Bit 6
Bit 6
6
1
6
1
6
1
6
1
Bit 13
Bit 13
Bit 5
Bit 5
5
1
5
1
5
1
5
1
Figure
NOTE
Bit 12
Bit 12
Bit 4
Bit 4
4
1
4
1
4
1
4
1
8-4, contains the current high and low bytes of the
Figure
Bit 11
Bit 11
Bit 3
Bit 3
3
1
3
1
3
1
3
1
8-5, contain the current high and low
Bit 10
Bit 10
Bit 2
Bit 2
2
1
2
1
2
1
2
1
Bit 9
Bit 1
Bit 9
Bit 1
1
1
1
0
1
1
1
0
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0
Timer I/O Registers
1
0
1
0
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