MC68HC11F1CFN2 Freescale Semiconductor, MC68HC11F1CFN2 Datasheet - Page 31

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MC68HC11F1CFN2

Manufacturer Part Number
MC68HC11F1CFN2
Description
IC MCU 512 EEPROM 2MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC11F1CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
30
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Program Memory Size
-

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Bit 1 — Not implemented. Reads always return one and writes have no effect.
EEON — EEPROM Enable
6.3 EEPROM Programming and Erasure
6.3.1 Programming a Byte
6.3.2 Bulk Erase
MC68HC11F1/FC0
MC68HC11FTS/D
This bit is forced to one in single-chip and bootstrap modes. In test mode, EEON is forced to zero out
of reset. In expanded mode, the EEPROM obeys the state of this bit.
Refer to 6.4 CONFIG Register Programming for instructions on programming this register.
Programming and erasing the EEPROM is controlled by the PPROG register, subject to the block pro-
tect (BPROT) register value. To erase the EEPROM, ensure that the proper bits of the BPROT register
are cleared, and then complete the following steps:
To program the EEPROM, ensure that the proper bits of the BPROT register are cleared, and then com-
plete the following steps:
The following example shows how to program an EEPROM byte. This example assumes that the ap-
propriate bits in BPROT are cleared and that the data to be programmed is present in accumulator A.
PROG
The following example shows how to bulk erase the 512-byte EEPROM. The CONFIG register is not
affected in this example. Note that when the CONFIG register is bulk erased, CONFIG and the 512-byte
array are all erased.
BULKE
0 = EEPROM is removed from the memory map.
1 = EEPROM is present in the memory map.
1. Write to PPROG with the ERASE and EELAT bits set and the BYTE and ROW bits set or
2. Write to the appropriate EEPROM address with any data. Row erase ($xE00–$xE0F, $xE10–
3. Write to PPROG with the ERASE, EELAT, and EEPGM bits set and the BYTE and ROW bits
4. Delay for 10 ms (20 ms for low-voltage operation).
5. Clear the EEPGM bit in PPROG to turn off the high voltage.
6. Clear the PPROG register to reconfigure EEPROM address and data buses for normal opera-
1. Write to PPROG with the EELAT bit set.
2. Write data to the desired address.
3. Write to PPROG with the EELAT and EEPGM bits set.
4. Delay for 10 ms (20 ms for low-voltage operation).
5. Clear the EEPGM bit in PPROG to turn off the high voltage.
6. Clear the PPROG register to reconfigure EEPROM address and data buses for normal opera-
cleared as appropriate.
$xE1F,... $xFF0–$xFFF) requires a single write to any location in the row. Perform bulk erase
by writing to any location in the array.
set or cleared as appropriate.
tions.
tions.
LDAB
STAB
STAA
LDAB
STAB
JSR
CLR
LDAB
STAB
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EELAT=1, EEPGM=0
Set EELAT bit
Store data to EEPROM address
EELAT=1, EEPGM=1
Turn on programming voltage
Delay 10 ms
Turn off high voltage and set to READ mode
ERASE=1, EELAT=1, EEPGM=0
Set EELAT bit
31

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