MC68HC705JP7CDW Freescale Semiconductor, MC68HC705JP7CDW Datasheet - Page 95
MC68HC705JP7CDW
Manufacturer Part Number
MC68HC705JP7CDW
Description
IC MCU 8BIT 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet
1.MC705JJ7CDWE.pdf
(164 pages)
Specifications of MC68HC705JP7CDW
Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SIO
Peripherals
POR, Temp Sensor, WDT
Number Of I /o
22
Program Memory Size
6KB (6K x 8)
Program Memory Type
OTP
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Chapter 9
Simple Synchronous Serial Interface
9.1 Introduction
The simple synchronous serial I/O port (SIOP) subsystem is designed to provide efficient serial
communications with peripheral devices or other MCUs. SIOP is implemented as a 3-wire master/slave
system with serial clock (SCK), serial data input (SDI), and serial data output (SDO). A block diagram of
the SIOP is shown in
Freescale Semiconductor
OSCILLATOR
INTERRUPT
CLOCK
$000A
$000B
SIOP
CPHA
MSTR
SPE
LSBF
SPIR
SPIE
DCOL
SPIF
SPR0
SPR1
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
÷2
Figure
9-1.
Q
LATCH
DIVIDER
SELECT
CLOCK
AND
S
R
Figure 9-1. SIOP Block Diagram
INTERNAL M68HC05 BUS
CONTROL
CLOCK
$000C
DIN
CLK
COMP
ERROR
(LSB OR MSB FIRST)
FORMAT CONTROL
DATA REGISTER
(SDR)
SIOP
8-BIT SHIFT
REGISTER
DOUT
PORTB LOGIC
PORTB LOGIC
PORTB LOGIC
SDO
SCK
PB7
PB6
PB5
SDI
95
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