MCF5307FT90B Freescale Semiconductor, MCF5307FT90B Datasheet
MCF5307FT90B
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... Freescale Semiconductor, Inc. Advance Information MCF5307PB/D Rev. 1, 1/2002 MCF5307 Integrated Microprocessor Product Brief This document provides an overview of the MCF5307 ColdFire processor. It includes general descriptions of the modules and features incorporated in the MCF5307. 1.1 The MCF5307 integrated microprocessor combines a V3 ColdFire processor core with the following components, as shown in Figure 1: • ...
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... Freescale Semiconductor, Inc. Features JTAG Debug Module PSTCLK BCLKO (sent off-chip and to on-chip peripherals) CLKIN PCLK PLL X n RSTI RSTO Local Memory Bus SYSTEM INTEGRATION MODULE (SIM) PLL Control System Control PLL RSR SWIVR SYPCR SWSR DRAM Controller Chip-Select Module DRAM Control ...
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... Freescale Semiconductor, Inc. Features common to many embedded applications, such as DMAs, various DRAM controller interfaces, and on-chip memories, are integrated using advanced process technologies. The MCF5307 extends the legacy of Motorola’s 68K family by providing a compatible path for 68K and ColdFire customers in which development tools and customer code can be leveraged. In fact, customers moving from 68K to ColdFire can use code translation and emulation tools that facilitate modifying 68K assembly code to the ColdFire architecture ...
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... Freescale Semiconductor, Inc. MCF5307 Features — 32-bit data bus — 16 user-accessible, 32-bit-wide, general-purpose registers — Supervisor/user modes for system protection — Vector base register to relocate exception-vector table — Optimized for high-level language constructs • Multiply and accumulate unit (MAC) — High-speed, complex arithmetic processing for DSP applications — ...
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... Freescale Semiconductor, Inc. — 512 Mbytes of DRAM — Programmable timer provides CAS-before-RAS refresh for asynchronous DRAMs — Support for two separate memory blocks • Two UARTs — Full-duplex operation — Programmable clock — Modem control signals available (CTS, RTS) — Processor-interrupt capability • ...
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... Freescale Semiconductor, Inc. ColdFire Module Description • On-chip PLL — Supports processor clock/bus clock ratios of 66/33, 66/22, 66/16.5, 90/45, 90/30, and 90/22.5 — Supports low-power mode • Product offerings — 75 Dhrystone 2.1 MIPS at 90 MHz — Implemented in 0.35 µ, triple-layer-metal process technology with 3.3-V operation (5.0-V compliant I/O pads) — ...
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... Freescale Semiconductor, Inc. 1.3.1.3 MAC Module The MAC unit provides signal processing capabilities for the MCF5307 in a variety of applications including digital audio and servo control. Integrated as an execution unit in the processor’s OEP, the MAC unit implements a three-stage arithmetic pipeline optimized for multiplies. Both 16- and 32-bit input operands are supported by this design in addition to a full set of extensions for signed and unsigned integers, plus signed, fi ...
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... Freescale Semiconductor, Inc. ColdFire Module Description 1.3.4 UART Modules The MCF5307 contains two UARTs, which function independently. Either UART can be clocked by the system bus clock, eliminating the need for an external crystal. Each UART module interfaces directly to the CPU, as shown in Figure 2. System Integration ...
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... Freescale Semiconductor, Inc. need occasional bursts of rapid communication over short distances among several devices. The I operate in master, slave, or multiple-master modes. 1.3.7 System Interface The MCF5307 processor provides a direct interface to 8-, 16-, and 32-bit FLASH, SRAM, ROM, and peripheral devices through the use of fully programmable chip selects and write enables. Support for burst ROMs is also included ...
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... Freescale Semiconductor, Inc. ColdFire Module Description 1.3.8 System Debug Interface The ColdFire processor core debug interface is provided to support system debugging in conjunction with low-cost debug and emulator development tools. Through a standard debug interface, users can access real-time trace and debug information. This allows the processor and system to be debugged at full speed without the need for costly in-circuit emulators. The debug unit in the MCF5307 is a compatible upgrade to the MCF52xx debug module with added fl ...
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... Freescale Semiconductor, Inc. • Reduced-power mode—In reduced-power mode, the PCLK is disabled by executing a sequence that includes programming a control bit in the system configuration register (SCR) and then executing the STOP instruction. Register contents are retained in reduced-power mode, so the system can be reenabled quickly when an unmasked interrupt or reset is detected. ...
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... Freescale Semiconductor, Inc. Programming Model, Addressing Modes, and Instruction Set Figure 4. ColdFire MCF5307 Programming Model 1.4.2 User Registers The user programming model is shown in Figure 4 and summarized in Table 1. Register Data registers These 32-bit registers are for bit, byte, word, and longword operands. They can also be used as (D0– ...
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... Freescale Semiconductor, Inc. Programming Model, Addressing Modes, and Instruction Set Table 1. User-Level Registers (continued) Register Condition code The CCR is the lower byte of the SR. It contains indicator flags that reflect the result of a previous register (CCR) operation and are used for conditional instruction execution. ...
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... Freescale Semiconductor, Inc. Programming Model, Addressing Modes, and Instruction Set MCF5307 Integrated Microprocessor Product Brief 14 For More Information On This Product, Go to: www.freescale.com MOTOROLA ...
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... Freescale Semiconductor, Inc. Programming Model, Addressing Modes, and Instruction Set MCF5307 Integrated Microprocessor Product Brief 15 For More Information On This Product, Go to: www.freescale.com MOTOROLA ...
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... DOCUMENT COMMENTS: FAX (512) 933-2625 Attn: TECD Applications Engineering Freescale Semiconductor, Inc. Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. ...