MC68HC908GT8CFB Freescale Semiconductor, MC68HC908GT8CFB Datasheet - Page 247

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MC68HC908GT8CFB

Manufacturer Part Number
MC68HC908GT8CFB
Description
IC MCU 8K FLASH 8MHZ 44-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GT8CFB

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
34
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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19.3.1.1 Normal Monitor Mode
When V
divide-by-two of the input clock. If PTC3 is high with V
bus frequency will be a divide-by-four of the input clock. Holding the PTC3 pin low when entering monitor
mode causes a bypass of a divide-by-two stage at the oscillator only if V
event, the CGMOUT frequency is equal to the CGMXCLK frequency, and the OSC1 input directly
generates internal bus clocks. In this case, the OSC1 signal must have a 50% duty cycle at maximum bus
frequency.
Freescale Semiconductor
Normal
Monitor
Forced
Monitor
User
MON08
Function
[Pin No.]
1. PTA0 must have a pullup resistor to VDD in monitor mode.
2. Communication speed in the table is an example to obtain a baud rate of 9600.
3. External clock is a 4.1952 MHz or 9.8304 MHz canned oscillator on OSC1.
4. X = don’t care.
5. MON08 pin refers to P&E Microcomputer Systems’ MONOUT-Cyclone 2 by 8-pin connector.
Mode
Baud rate using external oscillator is bus frequency / 256.
TST
or V
V
V
V
IRQ
V
V
V
[6]
TST
TST
TST
DD
SS
DD
is applied to IRQ and PTC3 is low upon monitor mode entry, the bus frequency is a
SS
V
V
DD
DD
or V
RST
RST
V
V
V
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
[4]
or V
or V
Table 19-1. Monitor Mode Signal Requirements and Options
DD
DD
DD
SS
SS
SS
Vector
(blank)
(blank)
$FFFF
$FFFF
$FFFF
Reset
Not
X
X
Comm.
Serial
PTA0
COM
OSC1
[8]
X
1
1
1
1
V
NC
NC
NC
NC
NC
NC
DD
Mode Selection Divider
MOD0
PTC0
[12]
11
13
15
X
X
X
1
1
1
3
5
7
9
MOD1
PTC1
[14]
10
12
14
16
X
X
X
0
0
2
4
6
8
TST
GND
RST
IRQ
NC
PTC1
PTC3
PTA0
PTC0
PTC3
DIV4
[16]
applied to IRQ upon monitor mode entry, the
X
X
X
0
1
OFF Disabled
OFF Disabled
OFF Disabled
ICG
ON Disabled
X
Enabled
COP
TST
is applied to IRQ. In this
External
4.9152
9.8304
9.8304
Clock
OSC1
MHz
MHz
MHz
[13]
Communication Speed
X
X
Monitor Module (MON)
Frequency
Nominal
2.4576
2.4576
2.4576
2.4576
MHz
MHz
MHz
MHz
Bus
X
Nominal
Range
Baud
9600
9600
9600
9600
X
247

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