MC68HC908JB8JDW Freescale Semiconductor, MC68HC908JB8JDW Datasheet - Page 95

IC MCU 8K FLASH 3MHZ 20-SOIC

MC68HC908JB8JDW

Manufacturer Part Number
MC68HC908JB8JDW
Description
IC MCU 8K FLASH 3MHZ 20-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908JB8JDW

Core Processor
HC08
Core Size
8-Bit
Speed
3MHz
Connectivity
USB
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

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MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
Signal Name
OSCXCLK
OSCOUT
PORRST
PIN LOGIC
IRST
RESET
R/W
IDB
IAB
INTERNAL
PULL-UP
VDD
Clock doubler output which has twice the frequency of OSC1 from the oscillator
The OSCXCLK frequency divided by two. This signal is again divided by two in the
SIM to generate the internal bus clocks.
(Bus clock = OSCXCLK ÷ 4 = f
Internal address bus
Internal data bus
Signal from the power-on reset module to the SIM
Internal reset signal
Read/write signal
Table 8-1. SIM Module Signal Name Conventions
SIM RESET STATUS REGISTER
RESET PIN CONTROL
POR CONTROL
STOP/WAIT
CONTROL
CONTROL
AND PRIORITY DECODE
Figure 8-1. SIM Block Diagram
INTERRUPT CONTROL
CLOCK
System Integration Module (SIM)
CLOCK GENERATORS
RESET
COUNTER
OSC
SIM
÷2
Description
÷ 2)
CONTROL
MASTER
RESET
LVI RESET (FROM LVI MODULE)
USB RESET (FROM USB MODULE)
MODULE STOP
MODULE WAIT
CPU STOP (FROM CPU)
CPU WAIT (FROM CPU)
SIMOSCEN (TO OSCILLATOR)
COP CLOCK
OSCXCLK (FROM CLOCK DOUBLER)
OSCOUT (FROM CLOCK DOUBLER)
INTERNAL CLOCKS
ILLEGAL OPCODE (FROM CPU)
ILLEGAL ADDRESS (FROM ADDRESS
MAP DECODERS)
COP TIMEOUT (FROM COP MODULE)
CPU INTERFACE
INTERRUPT SOURCES
System Integration Module (SIM)
Technical Data
Introduction
95

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