MC68HC908GZ8MFJ Freescale Semiconductor, MC68HC908GZ8MFJ Datasheet - Page 206

• Manufacturer Part Number: MC68HC908GZ8MFJ
• Description: IC MCU 8K FLASH 8MHZ CAN 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GZ8MFJ

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Enhanced Serial Communications Interface (ESCI) Module
15.8.8 ESCI Prescaler Register
The ESCI prescaler register (SCPSC) together with the ESCI baud rate register selects the baud rate for
both the receiver and the transmitter.
PDS2–PDS0 — Prescaler Divisor Select Bits
PSSB4–PSSB0 — Clock Insertion Select Bits
Use the following formula to calculate the ESCI baud rate:
where:
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These read/write bits select the prescaler divisor as shown in
These read/write bits select the number of clocks inserted in each 32 output cycle frame to achieve
more timing resolution on the average prescaler frequency as shown in
PSSB4–PSSB0.
Frequency of the SCI clock source = f
BPD = Baud rate register prescaler divisor
BD = Baud rate divisor
PD = Prescaler divisor
PDFA = Prescaler divisor fine adjust
ESCIBDSRC in the CONFIG2 register)
Address:
There are two prescalers available to adjust the baud rate. One in the ESCI
baud rate register and one in the ESCI prescaler register.
The setting of ‘000’ will bypass this prescaler. It is not recommended to
bypass the prescaler while ENSCI is set, because the switching is not glitch
free.
Reset:
Read:
Write:
$0009
PDS2
Bit 7
0
Baud rate =
Figure 15-18. ESCI Prescaler Register (SCPSC)
PS[2:1:0]
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Table 15-9. ESCI Prescaler Division Ratio
PDS1
6
0
Frequency of the SCI clock source
64 x BPD x BD x (PD + PDFA)
Bus
PDS0
5
0
or CGMXCLK (selected by
NOTE
NOTE
PSSB4
4
0
Prescaler Divisor (PD)
Bypass this prescaler
PSSB3
3
0
2
3
4
5
6
7
8
Table
PSSB2
2
0
15-9. Reset clears PDS2–PDS0.
Table
PSSB1
1
0
15-10. Reset clears
Freescale Semiconductor
PSSB0
Bit 0
0