C8051F020 Silicon Laboratories Inc, C8051F020 Datasheet - Page 196
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C8051F020
Manufacturer Part Number
C8051F020
Description
IC 8051 MCU 64K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F02xr
Specifications of C8051F020
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F020
Manufacturer:
SILICON
Quantity:
2
Company:
Part Number:
C8051F020
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
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Part Number:
C8051F020-GQ
Manufacturer:
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Quantity:
4 035
Company:
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Manufacturer:
MICRON
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200
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Manufacturer:
Silicon Laboratories Inc
Quantity:
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Part Number:
C8051F020-GQR
Manufacturer:
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Quantity:
3 000
Company:
Part Number:
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Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
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Manufacturer:
SIL
Quantity:
20 000
Company:
Part Number:
C8051F020DK
Manufacturer:
SiliconL
Quantity:
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Company:
Part Number:
C8051F020R
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051F020/1/2/3
196
Mode
Status
Code
0xA0
0xA8
0xB0
0xB8
0xC0
0xC8
0xD0
0x60
0x68
0x70
0x78
0x80
0x88
0x90
0x98
0x00
0xF8
Own slave address + W received. ACK trans-
mitted.
Arbitration lost in sending SLA + R/W as mas-
ter. Own address + W received. ACK transmit-
ted.
General call address received. ACK transmit-
ted.
Arbitration lost in sending SLA + R/W as mas-
ter. General call address received. ACK trans-
mitted.
Data byte received. ACK transmitted.
Data byte received. NACK transmitted.
Data byte received after general call address.
ACK transmitted.
Data byte received after general call address.
NACK transmitted.
STOP or repeated START received.
Own address + R received. ACK transmitted.
Arbitration lost in transmitting SLA + R/W as
master. Own address + R received. ACK
transmitted.
Data byte transmitted. ACK received.
Data byte transmitted. NACK received.
Last data byte transmitted (AA=0). ACK
received.
SCL Clock High Timer per SMB0CR timed out
Bus Error (illegal START or STOP)
Idle
Table 18.1. SMB0STA Status Codes and States
SMBus State
Rev. 1.4
Wait for data.
Save current data for retry when bus is
free. Wait for data.
Wait for data.
Save current data for retry when bus is
free.
Read SMB0DAT. Wait for next byte or
STOP.
Set STO to reset SMBus.
Read SMB0DAT. Wait for next byte or
STOP.
Set STO to reset SMBus.
No action necessary.
Load SMB0DAT with data to transmit.
Save current data for retry when bus is
free. Load SMB0DAT with data to trans-
mit.
Load SMB0DAT with data to transmit.
Wait for STOP.
Set STO to reset SMBus.
Set STO to reset SMBus.
Set STO to reset SMBus.
State does not set SI.
Typical Action