C8051F017 Silicon Laboratories Inc, C8051F017 Datasheet - Page 4

• Manufacturer Part Number: C8051F017
• Description: IC 8051 MCU 32K FLASH 32LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F01xr

Specifications of C8051F017

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 8
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 4x10b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 8
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• On-chip Dac: 12 bit, 2 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

11. FLASH MEMORY.............................................................................................................. 87
12. EXTERNAL RAM (C8051F005/06/07/15/16/17).............................................................. 92
13. RESET SOURCES .............................................................................................................. 93
14. OSCILLATOR .................................................................................................................... 99
15. PORT INPUT/OUTPUT................................................................................................... 103
Figure 10.5. DPH: Data Pointer High Byte .......................................................................................................74
Figure 10.6. PSW: Program Status Word..........................................................................................................75
Figure 10.7. ACC: Accumulator........................................................................................................................76
Figure 10.8. B: B Register .................................................................................................................................76
10.4.
Table 10.4. Interrupt Summary..........................................................................................................................78
Figure 10.9. IE: Interrupt Enable.......................................................................................................................79
Figure 10.10. IP: Interrupt Priority....................................................................................................................80
Figure 10.11. EIE1: Extended Interrupt Enable 1 .............................................................................................81
Figure 10.12. EIE2: Extended Interrupt Enable 2 .............................................................................................82
Figure 10.13. EIP1: Extended Interrupt Priority 1 ............................................................................................83
Figure 10.14. EIP2: Extended Interrupt Priority 2 ............................................................................................84
10.5.
Figure 10.15. PCON: Power Control Register ..................................................................................................86
11.1.
Table 11.1. FLASH Memory Electrical Characteristics ....................................................................................87
11.2.
11.3.
Figure 11.1. PSCTL: Program Store RW Control.............................................................................................88
Figure 11.2. Flash Program Memory Security Bytes .........................................................................................89
Figure 11.3. FLACL: Flash Access Limit (C8051F005/06/07/15/16/17 only) .................................................90
Figure 11.4. FLSCL: Flash Memory Timing Prescaler .....................................................................................91
Figure 12.1. EMI0CN: External Memory Interface Control .............................................................................92
Figure 13.1. Reset Sources Diagram .................................................................................................................93
13.1.
13.2.
Figure 13.2. VDD Monitor Timing Diagram ....................................................................................................94
13.3.
13.4.
13.5.
13.6.
13.7.
13.8.
Figure 13.3. WDTCN: Watchdog Timer Control Register ...............................................................................96
Figure 13.4. RSTSRC: Reset Source Register...................................................................................................97
Table 13.1. Reset Electrical Characteristics ......................................................................................................98
Figure 14.1. Oscillator Diagram ........................................................................................................................99
Figure 14.2. OSCICN: Internal Oscillator Control Register ...........................................................................100
Table 14.1. Internal Oscillator Electrical Characteristics ................................................................................100
Figure 14.3. OSCXCN: External Oscillator Control Register.........................................................................101
14.1.
14.2.
14.3.
15.1.
15.2.
Figure 15.1. Port I/O Functional Block Diagram ............................................................................................104
Figure 15.2. Port I/O Cell Block Diagram.......................................................................................................104
Table 15.1. Crossbar Priority Decode .............................................................................................................105
Figure 15.3. XBR0: Port I/O CrossBar Register 0 ..........................................................................................106
INTERRUPT HANDLER ...................................................................................................................77
Power Management Modes .................................................................................................................85
Programming The Flash Memory........................................................................................................87
Non-volatile Data Storage ...................................................................................................................88
Security Options ..................................................................................................................................88
Power-on Reset....................................................................................................................................94
Software Forced Reset.........................................................................................................................94
Power-fail Reset...................................................................................................................................94
External Reset......................................................................................................................................95
Missing Clock Detector Reset .............................................................................................................95
Comparator 0 Reset .............................................................................................................................95
External CNVSTR Pin Reset...............................................................................................................95
Watchdog Timer Reset ........................................................................................................................95
External Crystal Example ..................................................................................................................102
External RC Example ........................................................................................................................102
External Capacitor Example ..............................................................................................................102
Priority Cross Bar Decoder................................................................................................................103
Port I/O Initialization.........................................................................................................................103
Rev. 1.7
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
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