C8051F300 Silicon Laboratories Inc, C8051F300 Datasheet - Page 36

no-image

C8051F300

Manufacturer Part Number
C8051F300
Description
IC 8051 MCU 8K FLASH 11MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F30xr
Datasheets

Specifications of C8051F300

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
8
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
11-VQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F300
Manufacturer:
SILICON
Quantity:
200
Part Number:
C8051F300-GM
Manufacturer:
SiliconL
Quantity:
1 888
Part Number:
C8051F300-GM
Manufacturer:
TST
Quantity:
5 000
Part Number:
C8051F300-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Company:
Part Number:
C8051F300-GMR
Quantity:
81 500
Part Number:
C8051F300-GS
Manufacturer:
SOLOMONSY
Quantity:
2 659
C8051F300/1/2/3/4/5
5.3.2. Tracking Modes
The AD0TM bit in register ADC0CN controls the ADC0 track-and-hold mode. In its default state, the ADC0 input is
continuously tracked except when a conversion is in progress. When the AD0TM bit is logic 1, ADC0 operates in
low-power track-and-hold mode. In this mode, each conversion is preceded by a tracking period of 3 SAR clocks
(after the start-of-conversion signal). When the CNVSTR signal is used to initiate conversions in low-power tracking
mode, ADC0 tracks only when CNVSTR is low; conversion begins on the rising edge of CNVSTR (see Figure 5.4).
Tracking can also be disabled (shutdown) when the device is in low power standby or sleep modes. Low-power track-
and-hold mode is also useful when AMUX or PGA settings are frequently changed, due to the settling time require-
ments described in
36
Timer 0, Timer 2, Timer 1 Overflow
(AD0CM[2:0]=000, 001, 010, 011)
Write '1' to AD0BUSY,
Figure 5.4. 8-Bit ADC Track and Conversion Example Timing
Section “5.3.3. Settling Time Requirements” on page
(AD0CM[2:0]=1xx)
SAR Clocks
SAR Clocks
SAR Clocks
AD0TM=1
AD0TM=0
AD0TM=1
AD0TM=0
CNVSTR
Low Power
or Convert
Low Power
or Convert
Track or
Convert
A. ADC Timing for External Trigger Source
Track or Convert
B. ADC Timing for Internal Trigger Source
1
1
Rev. 2.3
Track
2
2
Track
3
3
Convert
4
4
1
5
5
2
6
6
3
Convert
7
7
Convert
Convert
4
8
8
37.
5
9
9
6
10 11 12
7
8
9
Low Power Mode
Low Power Mode
Track
Track

Related parts for C8051F300