C8051F300 Silicon Laboratories Inc, C8051F300 Datasheet - Page 97

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C8051F300

Manufacturer Part Number
C8051F300
Description
IC 8051 MCU 8K FLASH 11MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F30xr
Datasheets

Specifications of C8051F300

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
8
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
11-VQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Registers XBR1 and XBR2 are used to assign the digital I/O resources to the physical I/O Port pins. Note that when
the SMBus is selected, the Crossbar assigns both pins associated with the SMBus (SDA and SCL). Either or both of
the UART signals may be selected by the Crossbar. UART0 pin assignments are fixed for bootloading purposes:
when UART TX0 is selected, it is always assigned to P0.4; when UART RX0 is selected, it is always assigned to
P0.5. Standard Port I/Os appear contiguously after the prioritized functions have been assigned. For example, if
assigned functions that take the first 3 Port I/O (P0.[2:0]), 5 Port I/O are left for analog or GPIO use.
SF Signals
PIN I/O
TX0
RX0
SDA
SCL
CP0
CP0A
SYSCLK
CEX0
CEX1
CEX2
ECI
T0
T1
SF Signals
Figure 12.4. Crossbar Priority Decoder with XBR0 = 0x44
VREF
0
0
Port pin potentially available to peripheral
Port pin skipped by CrossBar
Special Function Signals are not assigned by the crossbar. When
these signals are enabled, the CrossBar must be manually
configured to skip their corresponding port pins. Note: x1 refers to
the XTAL1 signal; x2 refers to the XTAL2 signal.
1
0
x1
2
1
XBR0[0:7]
x2
3
0
P0
4
0
Rev. 2.3
5
0
CNVSTR
6
1
7
0
C8051F300/1/2/3/4/5
97

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