MC68HC711K4CFN4 Freescale Semiconductor, MC68HC711K4CFN4 Datasheet - Page 30

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MC68HC711K4CFN4

Manufacturer Part Number
MC68HC711K4CFN4
Description
IC MCU 24K OTP 4MHZ 84-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711K4CFN4

Core Processor
HC11
Core Size
8-Bit
Speed
4MHz
Connectivity
SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
62
Program Memory Size
24KB (24K x 8)
Program Memory Type
OTP
Eeprom Size
640 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Bit 7 — Not implemented
MM1CR — Memory Mapping Window 1 Control Register
MM2CR — Memory Mapping Window 2 Control Register
Bit 0 — Not implemented
4.2 Overlap Guidelines
4.3 Chip Selects
30
MOTOROLA
Always reads zero
When a 64 Kbyte CPU address falls within window 1, the value in MM1CR is driven out from the corre-
sponding expansion address lines to enable the specified bank in the window.
When a 64 Kbyte CPU address falls within window 2, the value in MM2CR is driven out from the corre-
sponding expansion address lines to enable the specified bank in the window.
Always reads zero
M68HC11 K-series MCUs have four software configured chip selects that are enabled in expanded
modes. The chip select for I/O (CSIO) is used for I/O expansion. The program chip select (CSPROG)
is used with an external memory that contains the reset vectors and program. The two general-purpose
chip selects, CSGP1 and CSGP2, are used to enable external devices. These external devices can be
in the 64 Kbyte memory space or in the expanded memory space. Chip select signals are a shared func-
tion of port H. When an MCU pin is not used for chip select functions it can be used for general-purpose
I/O. The following table contains a summary of the attributes of each chip select that can be controlled
by user software.
• On-chip registers, RAM, and EEPROM are higher priority than expansion windows. If a window
• If a window overlaps on-chip ROM/EPROM, the ROM/EPROM appears only in banks with
• Window 1 is higher priority than window 2, therefore any overlapped portion of window 2 is inac-
overlaps RAM, registers, or EEPROM, they appear in all banks at their CPU address.
XA[18:16] = 0:0:0.
cessible.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
M68HC11 K Series
MC68HC11KTS/D

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