MC9S12D64CFU Freescale Semiconductor, MC9S12D64CFU Datasheet - Page 19

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MC9S12D64CFU

Manufacturer Part Number
MC9S12D64CFU
Description
IC MCU 64K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12D64CFU

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
PWM, WDT
Number Of I /o
59
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.25 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Section 1 Introduction
1.1 Overview
The MC9S12DJ64 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip
peripherals including a 16-bit central processing unit (HCS12 CPU), 64K bytes of Flash EEPROM, 4K
bytes of RAM, 1K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), one
serial peripheral interfaces (SPI), an 8-channel IC/OC enhanced capture timer, two 8-channel, 10-bit
analog-to-digital converters (ADC), an 8-channel pulse-width modulator (PWM), a digital Byte Data Link
Controller (BDLC), 29 discrete digital I/O channels (Port A, Port B, Port K and Port E), 20 discrete digital
I/O lines with interrupt and wakeup capability, a CAN 2.0 A, B software compatible modules
(MSCAN12), and an Inter-IC Bus. The MC9S12DJ64 has full 16-bit data paths throughout. However, the
external bus can operate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower
cost systems. The inclusion of a PLL circuit allows power consumption and performance to be adjusted to
suit operational requirements.
1.2 Features
HCS12 Core
– 16-bit HCS12 CPU
– MEBI (Multiplexed External Bus Interface)
– MMC (Module Mapping Control)
– INT (Interrupt control)
– BKP (Breakpoints)
– BDM (Background Debug Mode)
CRG (low current Colpitts or Pierce oscillator, PLL, reset, clocks, COP watchdog, real time
interrupt, clock monitor)
8-bit and 4-bit ports with interrupt functionality
– Digital filtering
– Programmable rising or falling edge trigger
Memory
– 64K Flash EEPROM
– 1K byte EEPROM
i. Upward compatible with M68HC11 instruction set
ii. Interrupt stacking and programmer’s model identical to M68HC11
iii. Instruction queue
iv. Enhanced indexed addressing
MC9S12DJ64 Device User Guide — V01.20
19

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