M37516F8HP Renesas Electronics America, M37516F8HP Datasheet - Page 24

IC 740 MCU FLASH 32K 48QFP

M37516F8HP

Manufacturer Part Number
M37516F8HP
Description
IC 740 MCU FLASH 32K 48QFP
Manufacturer
Renesas Electronics America
Series
740/38000r
Datasheet

Specifications of M37516F8HP

Core Processor
740
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SIO, UART/USART
Peripherals
PWM, WDT
Number Of I /o
38
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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7516 Group
SERIAL I/O
Serial I/O1 can be used as either clock synchronous or asynchro-
nous (UART) serial I/O. A dedicated timer is also provided for
baud rate generation.
Fig. 18 Block diagram of clock synchronous serial I/O1
Fig. 19 Operation of clock synchronous serial I/O1 function
Rev.1.01
SERIAL I/O1
Write pulse to receive/transmit
buffer register (address 0018
Receive enable signal S
Transfer shift clock
(1/2 to 1/2048 of the internal
clock, or an external clock)
Notes 1: As the transmit interrupt (TI), either when the transmit buffer has emptied (TBE=1) or after the transmit shift operation has
P2
P2
P2
P2
Jul 01, 2003
7
/S
6
4
5
/S
/R
/T
2: If data is written to the transmit buffer register when TSC=0, the transmit clock is generated continuously and serial data
3: The receive interrupt (RI) is set when the receive buffer full flag (RBF) becomes “1” .
RDY1
Serial output TxD
X
Serial input RxD
CLK
X
X
ended (TSC=1), by setting the transmit interrupt source selection bit (TIC) of the serial I/O1 control register.
is output continuously from the TxD pin.
D
IN
D
BRG count source selection bit
RDY1
F/F
page 22 of 89
16
)
TBE = 0
1/4
Falling-edge detector
TBE = 1
TSC = 0
Receive buffer register
Receive shift register
D
D
0
0
Transmit buffer register
Transmit shift register
Data bus
Data bus
D
D
1
1
Address 0018
Shift clock
Serial I/O1 synchronous
clock selection bit
Frequency division ratio 1/(n+1)
Baud rate generator
Address 0018
Shift clock
Address 001C
D
D
2
2
(1) Clock Synchronous Serial I/O Mode
Clock synchronous serial I/O mode can be selected by setting the
serial I/O1 mode selection bit of the serial I/O1 control register (bit
6 of address 001A
For clock synchronous serial I/O, the transmitter and the receiver
must use the same clock. If an internal clock is used, transfer is
started by a write signal to the TB/RB.
16
Clock control circuit
16
Clock control circuit
16
D
D
3
3
Serial I/O1 control register
Transmit interrupt source selection bit
Receive buffer full flag (RBF)
Serial I/O1 status register
1/4
D
D
16
4
4
) to “1”.
Receive interrupt request (RI)
D
D
Transmit buffer empty flag (TBE)
Transmit shift completion flag (TSC)
5
5
Transmit interrupt request (TI)
Address 001A
D
D
Address 0019
6
6
Overrun error (OE)
detection
RBF = 1
TSC = 1
D
D
16
7
7
16

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