MC9S08RD32CFJE Freescale Semiconductor, MC9S08RD32CFJE Datasheet - Page 110

• Manufacturer Part Number: MC9S08RD32CFJE
• Description: IC MCU 32K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08RD32CFJE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

Carrier Modulator Transmitter (CMT) Block Description
8.5.1
The carrier signal is generated by counting a register-selected number of input clocks (125 ns for an 8 MHz
bus) for both the carrier high time and the carrier low time. The period is determined by the total number
of clocks counted. The duty cycle is determined by the ratio of high time clocks to total clocks counted.
The high and low time values are user programmable and are held in two registers.
An alternate set of high/low count values is held in another set of registers to allow the generation of dual
frequency FSK (frequency shift keying) protocols without CPU intervention.
The MCGEN bit in the CMTMSC register must be set and the BASE bit must be cleared to enable carrier
generator clocks. When the BASE bit is set, the carrier output to the modulator is held high continuously.
The block diagram is shown in
110
1. To prevent spurious operation, initialize all data and control registers before beginning a transmission (MCGEN=1).
2. These bits are not double buffered and should not be changed during a transmission (while MCGEN=1).
Baseband
IRO Latch
Extended
Space
Mode
Time
FSK
Carrier Generator
MCGEN
if any of the count values are equal to zero.
Only non-zero data values are allowed. The carrier generator will not work
Bit
1
1
1
1
0
(1)
BASE
Bit
0
1
0
x
x
(2)
Figure
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
Bit
FSK
Table 8-2. CMT Modes of Operation
0
x
1
x
x
(2)
8-3.
EXSPC
Bit
0
0
0
1
x
NOTE
f
f
f
f
secondary high/low registers.
f
Setting the EXSPC bit causes subsequent modulator cycles
to be spaces (modulator out not asserted) for the duration of
the modulator period (mark and space times).
IROL bit controls state of IRO pin.
CG
CG
CG
CG
CG
control alternates between primary high/low registers and
controlled by primary high and low registers.
transmitted to IRO pin when modulator gate is open.
is always high. IRO pin high when modulator gate is open.
transmitted to IRO pin when modulator gate is open.
Comment
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