M30260F6AGP#U5 Renesas Electronics America, M30260F6AGP#U5 Datasheet - Page 218
![IC M16C MCU FLASH 48K 48LQFP](/photos/28/61/286102/48-lqfp__plqp0048kb-a_sml.jpg)
M30260F6AGP#U5
Manufacturer Part Number
M30260F6AGP#U5
Description
IC M16C MCU FLASH 48K 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Specifications of M30260F6AGP#U5
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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6
Table 14.1.7.1 Delayed Trigger Mode 0 Specifications
NOTES:
0
A/D Conversion Start
A/D Conversion Stop
Readout of A/D Conversion Result Readout one of the AN0 to AN7 registers that corresponds to the selected pins
Function
Condition
Interrupt Request
Generation Timing
Analog Input Pin
C
14.1.7 Delayed Trigger Mode 0
2
9
1. Set the larger value than the value of the timer B0 register to the timer B1 register.
2. Do not write “1” (A/D conversion started) to the ADST bit in delayed trigger mode 0. When write “1”, unexpected
3. AN
0 .
2 /
B
In delayed trigger mode 0, analog voltages applied to the selected pins are converted one-by-one to a
digital code. The delayed trigger mode 0 used in combination with A/D trigger mode of Timer B. The
Timer B0 underflow starts a single sweep conversion. After completing the AN
pin is not sampled and converted until the Timer B1 underflow is generated. When the Timer B1 under-
flow is generated, the single sweep conversion is restarted with the AN
delayed trigger mode 0 specifications. Figure 14.1.7.1 shows the operation example in delayed trigger
mode 0. Figure 14.1.7.2 and Figure 14.1.7.3 show each flag operation in the ADSTAT0 register that
corresponds to the operation example. Figure 14.1.7.4 shows the ADCON0 to ADCON2 registers in
delayed trigger mode 0. Figure 14.1.7.5 shows the ADTRGCON register in delayed trigger mode 0 and
Table 14.1.7.2 shows the trigger select bit setting in delayed trigger mode 0.
0
0
6
interrupts may be generated.
group.
2
A
0
F
Item
2
30
e
G
0 -
b
o r
to AN
1 .
2
0
u
, 5
0
p
2
(
32
0
M
0
7
1
can be used in the same way as AN
6
C
page 199
2 /
6
, A
M
The SCAN1 to SCAN0 bits in the ADCON1 register and ADGSEL1 to ADGSEL0 bits in
the ADCON2 register select pins. Analog voltage applied to the input voltage of the
selected pins are converted one-by-one to the digital code. At this time, Timer B0 under
flow generation starts AN
version after the AN
AN
AN
A/D conversion completed
Select from AN
AN
1
•When single sweep conversion from the AN
•Set the ADST bit to "0" (A/D conversion halted)
f o
•When Timer B0 underflow is generated if Timer B0 underflow is generated again
•When Timer B0 underflow is generated during A/D conversion of pins after the AN
•When Timer B1 underflow is generated during A/D conversion of the AN
6
before Timer B1 underflow is generated , the conversion is not affected
pin, conversion is halted and the sweep is restarted from AN
input voltage of the AN
sweep start when AN
0
1
C
0
3
pin conversion start condition
pin conversion start condition
2
2 /
to AN
9
6
, B
7
M
(8 pins)
1
6
C
0
to AN
2 /
1
6
pin.
(3)
) T
0
0
1
0
1
conversion is completed.
(1)
to AN
(2 pins), AN
pin conversion. Timer B1 underflow generation starts con
pin is sampled. The AN
Specification
7
. However, all input pins need to belong to the same
0
to AN
3
(4 pins), AN
1
0
1
conversion and the rest of the
pin is completed
pin. Table 14.1.7.1 shows the
(2)
0
pin conversion, the AN
0
0
pin
to AN
14. A/D Converter
5
(6 pins) and
0
pin, the
1
1
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