MCR908JK1CDWE Freescale Semiconductor, MCR908JK1CDWE Datasheet - Page 85

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MCR908JK1CDWE

Manufacturer Part Number
MCR908JK1CDWE
Description
IC MCU 1.5K FLASH 20-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCR908JK1CDWE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LED, LVD, POR, PWM
Number Of I /o
14
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 12x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
7.6.1.1 Hardware Interrupts
MC68H(R)C908JL3
Freescale Semiconductor
INTERRUPT
INTERRUPT
MODULE
MODULE
I BIT
I BIT
R/W
R/W
IDB
IDB
IAB
IAB
DUMMY
Rev. 1.1
DUMMY
At the beginning of an interrupt, the CPU saves the CPU register
contents on the stack and sets the interrupt mask (I bit) to prevent
additional interrupts. At the end of an interrupt, the RTI instruction
recovers the CPU register contents from the stack so that normal
processing can resume.
7-10
A hardware interrupt does not stop the current instruction. Processing of
a hardware interrupt begins after completion of the current instruction.
When the current instruction is complete, the SIM checks all pending
hardware interrupts. If interrupts are not masked (I bit clear in the
condition code register), and if the corresponding interrupt enable bit is
SP – 4
SP
PC – 1[7:0] PC – 1[15:8]
shows interrupt recovery timing.
CCR
Figure 7-10. Interrupt Recovery
SP – 1
SP – 3
Figure 7-9
System Integration Module (SIM)
A
SP – 2
SP – 2
.
X
Interrupt Entry
X
SP – 3
Figure 7-9
SP – 1
PC – 1[7:0] PC – 1[15:8] OPCODE
A
SP – 4
SP
shows interrupt entry timing.
CCR
VECT H
PC
V DATA H
System Integration Module (SIM)
VECT L
PC + 1
OPERAND
V DATA L
START ADDR
OPCODE
Technical Data
Figure
83

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