MC908GR16ACFAER Freescale Semiconductor, MC908GR16ACFAER Datasheet - Page 153

• Manufacturer Part Number: MC908GR16ACFAER
• Description: IC MCU 16K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR16ACFAER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

error occurs. In most applications, the baud rate tolerance is much more than the degree of misalignment
that is likely to occur.
As the receiver samples an incoming character, it resynchronizes the RT clock on any valid falling edge
within the character. Resynchronization within characters corrects misalignments between transmitter bit
times and receiver bit times.
Slow Data Tolerance
Figure 14-8
or a framing error. The slow stop bit begins at RT8 instead of RT1 but arrives in time for the stop bit data
samples at RT8, RT9, and RT10.
Fast Data Tolerance
Figure 14-9
or a framing error. The fast stop bit ends at RT10 instead of RT16 but is still there for the stop bit data
samples at RT8, RT9, and RT10.
Freescale Semiconductor
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For an 8-bit character, data sampling of the stop bit takes the receiver 9 bit times × 16 RT cycles
+ 10 RT cycles = 154 RT cycles.
With the misaligned character shown in
when the count of the transmitting device is 9 bit times × 16 RT cycles + 3 RT cycles
= 147 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a slow
8-bit character with no errors is:
For a 9-bit character, data sampling of the stop bit takes the receiver 10 bit times × 16 RT cycles
+ 10 RT cycles = 170 RT cycles.
With the misaligned character shown in
when the count of the transmitting device is 10 bit times × 16 RT cycles + 3 RT cycles
= 163 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a slow
9-bit character with no errors is:
shows how much a slow received character can be misaligned without causing a noise error
shows how much a fast received character can be misaligned without causing a noise error
RECEIVER
RT CLOCK
MC68HC908GR16A Data Sheet, Rev. 1.0
MSB
Figure 14-8. Slow Data
154 147
------------------------- -
170 163
------------------------- -
154
170
–
–
Figure
Figure
×
×
100
100
14-8, the receiver counts 154 RT cycles at the point
14-8, the receiver counts 170 RT cycles at the point
SAMPLES
=
=
DATA
4.54%
4.12%
STOP
Functional Description
153