SAF-XC164GM-4F20F AA Infineon Technologies, SAF-XC164GM-4F20F AA Datasheet - Page 16

• Manufacturer Part Number: SAF-XC164GM-4F20F AA
• Description: IC MCU 16BIT 32KB FLASH TQFP64-8
• Manufacturer: Infineon Technologies
• Series: XC16xr

Specifications of SAF-XC164GM-4F20F AA

• Core Processor: C166SV2
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 47
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.7 V
• Data Converters: A/D 14x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LFQFP
• For Use With: MCBX167-NET - BOARD EVAL INFINEON CAN/ETHRNTMCBXC167-BASIC - BOARD EVAL BASIC INFINEON XC16X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: SAF-XC164GM-4F20FAACT; SAF-XC164GM-4F20FAACT; SAF-XC164GM-4F20FAAINCT

3
The architecture of the XC164GM combines advantages of RISC, CISC, and DSP
processors with an advanced peripheral subsystem in a very well-balanced way. In
addition, the on-chip memory blocks allow the design of compact systems-on-silicon with
maximum performance (computing, control, communication).
The on-chip memory blocks (program code-memory and SRAM, dual-port RAM, data
SRAM) and the set of generic peripherals are connected to the CPU via separate buses.
Another bus, the LXBus, connects additional on-chip resources (see
This bus structure enhances the overall system performance by enabling the concurrent
operation of several subsystems of the XC164GM.
The following block diagram gives an overview of the different on-chip components and
of the advanced, high bandwidth internal bus structure of the XC164GM.
Figure 3
Data Sheet
XTAL
C hannels
Clock Generation
8/10-Bit
ADC
Debug Support
Osc / PLL
14
32/64/128 Kbytes
OCDS
Port 9
Functional Description
ProgMem
PSRAM
2 Kbytes
6
Flash
Block Diagram
GPT
T2
T3
T4
T5
T6
ASC0
(U SAR T)
BR Gen
RTC WDT
ASC1
(U SAR T)
BR Gen
Port 5
14
SSC0
BR Gen
(SPI)
SSC1
C166SV2-Core
BR Gen
(SPI)
Interrupt & PEC
DPRAM
14
2 Kbytes
CPU
Port 3
13
CC2
T7
T8
Peripheral Data Bus
Interrupt Bus
Functional Description
POR T1
Mc_xc164gm_block1.vsd
14
Figure
0/2/4 Kbytes
DSRAM
Derivatives
V1.2, 2007-03
reduced
Control
XC164GM
LXBus
EBC
3).
Twin
CAN
A
B