SAF-XC164D-8F20F BB Infineon Technologies, SAF-XC164D-8F20F BB Datasheet - Page 6
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SAF-XC164D-8F20F BB
Manufacturer Part Number
SAF-XC164D-8F20F BB
Description
IC MCU 16BIT FLASH TQFP-100-16
Manufacturer
Infineon Technologies
Series
XC16xr
Datasheet
1.SAF-XC164D-16F20F_BB.pdf
(76 pages)
Specifications of SAF-XC164D-8F20F BB
Core Processor
C166SV2
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
PWM, WDT
Number Of I /o
79
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.7 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
For Use With
MCBX167-NET - BOARD EVAL INFINEON CAN/ETHRNTMCBXC167-BASIC - BOARD EVAL BASIC INFINEON XC16X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
FX164D8F20FBBNP
FX164D8F20FBBXP
SAFXC164D8F20FBB
SP000094511
SP000224581
FX164D8F20FBBXP
SAFXC164D8F20FBB
SP000094511
SP000224581
16-Bit Single-Chip Microcontroller with C166SV2 Core
XC166 Family
1
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1) Depends on the respective derivative. The derivatives are listed in
Data Sheet
High Performance 16-bit CPU with 5-Stage Pipeline
– 25 ns Instruction Cycle Time at 40 MHz CPU Clock (Single-Cycle Execution)
– 1-Cycle Multiplication (16 × 16 bit), Background Division (32 / 16 bit) in 21 Cycles
– 1-Cycle Multiply-and-Accumulate (MAC) Instructions
– Enhanced Boolean Bit Manipulation Facilities
– Zero-Cycle Jump Execution
– Additional Instructions to Support HLL and Operating Systems
– Register-Based Design with Multiple Variable Register Banks
– Fast Context Switching Support with Two Additional Local Register Banks
– 16 Mbytes Total Linear Address Space for Code and Data
– 1024 Bytes On-Chip Special Function Register Area (C166 Family Compatible)
16-Priority-Level Interrupt System with up to 75 Sources, Sample-Rate down to 50 ns
8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via
Peripheral Event Controller (PEC), 24-Bit Pointers Cover Total Address Space
Clock Generation via on-chip PLL (factors 1:0.15 … 1:10), or
via Prescaler (factors 1:1 … 60:1)
On-Chip Memory Modules
– 2 Kbytes On-Chip Dual-Port RAM (DPRAM)
– 2/4 Kbytes On-Chip Data SRAM (DSRAM)
– 2 Kbytes On-Chip Program/Data SRAM (PSRAM)
– 64/128 Kbytes On-Chip Program Memory (Flash Memory or Mask ROM)
On-Chip Peripheral Modules
– Two 16-Channel General Purpose Capture/Compare Units (12 Input/Output Pins)
– Capture/Compare Unit for flexible PWM Signal Generation (CAPCOM6)
– Multi-Functional General Purpose Timer Unit with 5 Timers
– Two Synchronous/Asynchronous Serial Channels (USARTs)
– Two High-Speed-Synchronous Serial Channels
– On-Chip TwinCAN Interface (Rev. 2.0B active) with 32 Message Objects
– On-Chip Real Time Clock
Idle, Sleep, and Power Down Modes with Flexible Power Management
Programmable Watchdog Timer and Oscillator Watchdog
Up to 12 Mbytes External Address Space for Code and Data
(3/6 Capture/Compare Channels and 1 Compare Channel)
(Full CAN/Basic CAN) on Two CAN Nodes, and Gateway Functionality
Summary of Features
4
1)
Table
1.
V1.2, 2006-08
XC164D
1)