SAK-XC167CI-32F40F BB-A Infineon Technologies, SAK-XC167CI-32F40F BB-A Datasheet - Page 83

• Manufacturer Part Number: SAK-XC167CI-32F40F BB-A
• Description: IC MCU 16BIT 128KB TQFP-144-19
• Manufacturer: Infineon Technologies
• Series: XC16xr

Specifications of SAK-XC167CI-32F40F BB-A

• Core Processor: C166SV2
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 103
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.7 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LFQFP
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: 2xASC, 2xSSC, 1xI2C
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 103
• Number Of Timers: 11
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Packages: PG-TQFP-144
• Max Clock Frequency: 40.0 MHz
• Sram (incl. Cache): 12.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 16
• Program Memory: 256.0 KByte
• For Use With: B158-H8963-X-X-7600IN - KIT EASY XC167CIMCBX167-NET - BOARD EVAL INFINEON CAN/ETHRNTMCBXC167-BASIC - BOARD EVAL BASIC INFINEON XC16X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: KX167CI32F40FBBANT; KX167CI32F40FBBAXT; SAKXC167CI32F40FBBAT; SP000098778; SP000224706

Figure 23
Note: If the READY input is sampled inactive at the indicated sampling point (“Not Rdy”)
Data Sheet
CLKOUT
RD, WR
D15-D0
(read)
D15-D0
(write)
READY
Synchronous
READY
Asynchron.
a READY-controlled waitstate is inserted (
sampling the READY input active at the indicated sampling point (“Ready”)
terminates the currently running bus cycle.
Note the different sampling points for synchronous and asynchronous READY.
This example uses one mandatory waitstate (see
evaluated.
READY Timing
tp
D
tc
Not Rdy
tc
10
tc
30
31
tp
81
E
Data Out
tp
Not Rdy
READY
tc
tc
tc
RDY
30
30
31
),
tp
tp
E
RDY
tc
tc
) before the READY input is
Data In
READY
tc
31
30
30
Electrical Parameters
tc
tp
tc
tc
20
F
31
31
XC167CI-32F
Derivatives
V1.1, 2006-08
MCT05559
tc
25